1990/0430/power/l.s (diff list | history)

1990/0427/sys/src/9/power/l.s:8,13 – 1990/0430/sys/src/9/power/l.s:8,14 (short | long | prev | next)
1990/0227		/* * Boot first processor
1990/0430		* - why is the processor number loaded from R0 ?????
1990/0227		*/ TEXT start(SB), $-4
1990/0427/sys/src/9/power/l.s:58,63 – 1990/0430/sys/src/9/power/l.s:59,65
1990/0227		/* * Take first processor into user mode
1990/0430		* - argument is stack pointer to user
1990/0227		*/ TEXT touser(SB), $-4
1990/0427/sys/src/9/power/l.s:145,159 – 1990/0430/sys/src/9/power/l.s:147,194
1990/0227		MOVW 4(R2), R29 RET
1990/0419		TEXT gotopc(SB), $0
1990/0430		TEXT gotopc(SB), $-4
1990/0419
1990/0427		MOVW $0, R0
1990/0419		MOVW 0(FP), R2
1990/0430		MOVW 0(FP), R7 /* save arguments for later */
1990/0427		MOVW _argc(SB), R4 MOVW _argv(SB), R5
1990/0419		JAL (R2) RET /* shouldn't get here */
1990/0430		MOVW $WBFLUSH, R1 /* flush write buffer */ MOVW 0(R1), R1 NOOP MOVW $KSEG1, R3 /* change to uncached address space */ MOVW $gotopc0(SB), R2 OR R3, R2 JMP (R2) TEXT gotopc0(SB), $-4 MOVW $(SWC|ISC), R1 /* swap and isolate cache, stay splhi */ MOVW R1, M(STATUS) NOOP MOVW $gotopc1(SB), R2 /* change back to cached address space */ JMP (R2) TEXT gotopc1(SB), $-4 MOVW $KSEG0, R6 /* init loop variables */ MOVW $(64*1024), R8 _gotopc1: MOVBU R0, 0x00(R6) SUB $0x4, R8 ADD $0x4, R6 BGTZ R8, _gotopc1 MOVW $gotopc2(SB), R2 /* change to uncached address space */ OR R3, R2 JMP (R2) TEXT gotopc2(SB), $-4 MOVW R0, M(STATUS) /* put caches back, still splhi */ NOOP JMP (R7)
1990/0227		TEXT puttlb(SB), $4 JAL splhi(SB)
1990/0427/sys/src/9/power/l.s:438,443 – 1990/0430/sys/src/9/power/l.s:473,479
1990/0227		RET TEXT restfpregs(SB), $0
1990/0430
1990/0227		MOVW M(STATUS), R3 MOVW 0(FP), R1 OR $CU1, R3
1990/0427/sys/src/9/power/l.s:464,467 – 1990/0430/sys/src/9/power/l.s:500,598
1990/0227		MOVW R2, FCR31 AND $~CU1, R3 MOVW R3, M(STATUS)
1990/0430		RET TEXT icflush(SB), $-4 /* icflush(physaddr, nbytes) */ MOVW M(STATUS), R6 MOVW 0(FP), R4 MOVW 4(FP), R5 MOVW $KSEG0, R3 OR R3, R4 MOVW $0, M(STATUS) MOVW $WBFLUSH, R1 /* wbflush */ MOVW 0(R1), R1 NOOP MOVW $KSEG1, R3 MOVW $icflush0(SB), R2 /* make sure PC is in uncached address space */ MOVW $(SWC|ISC), R1 OR R3, R2 JMP (R2) TEXT icflush0(SB), $-4 MOVW R1, M(STATUS) /* swap and isolate cache, splhi */ MOVW $icflush1(SB), R2 JMP (R2) TEXT icflush1(SB), $-4 _icflush1: MOVBU R0, 0x00(R4) MOVBU R0, 0x04(R4) MOVBU R0, 0x08(R4) MOVBU R0, 0x0C(R4) MOVBU R0, 0x10(R4) MOVBU R0, 0x14(R4) MOVBU R0, 0x18(R4) MOVBU R0, 0x1C(R4) MOVBU R0, 0x20(R4) MOVBU R0, 0x24(R4) MOVBU R0, 0x28(R4) MOVBU R0, 0x2C(R4) MOVBU R0, 0x30(R4) MOVBU R0, 0x34(R4) MOVBU R0, 0x38(R4) MOVBU R0, 0x3C(R4) SUB $0x40, R5 ADD $0x40, R4 BGTZ R5, _icflush1 MOVW $icflush2(SB), R2 /* make sure PC is in uncached address space */ OR R3, R2 JMP (R2) TEXT icflush2(SB), $-4 MOVW $0, M(STATUS) /* swap back caches, de-isolate them, and stay splhi */ NOOP /* +++ */ MOVW R6, M(STATUS) RET TEXT dcflush(SB), $-4 /* dcflush(physaddr, nbytes) */ MOVW M(STATUS), R6 MOVW 0(FP), R4 MOVW 4(FP), R5 MOVW $KSEG0, R3 OR R3, R4 MOVW $0, M(STATUS) MOVW $WBFLUSH, R1 MOVW 0(R1), R1 NOOP MOVW $ISC, R1 MOVW R1, M(STATUS) _dcflush0: MOVBU R0, 0x00(R4) MOVBU R0, 0x04(R4) MOVBU R0, 0x08(R4) MOVBU R0, 0x0C(R4) MOVBU R0, 0x10(R4) MOVBU R0, 0x14(R4) MOVBU R0, 0x18(R4) MOVBU R0, 0x1C(R4) MOVBU R0, 0x20(R4) MOVBU R0, 0x24(R4) MOVBU R0, 0x28(R4) MOVBU R0, 0x2C(R4) MOVBU R0, 0x30(R4) MOVBU R0, 0x34(R4) MOVBU R0, 0x38(R4) MOVBU R0, 0x3C(R4) SUB $0x40, R5 ADD $0x40, R4 BGTZ R5, _dcflush0 MOVW $0, M(STATUS) NOOP /* +++ */ MOVW R6, M(STATUS)
1990/0227		RET