plan 9 kernel history: overview | file list | diff list

1990/1227/ss/mmu.c (diff list | history)

1990/1226/sys/src/9/ss/mmu.c:40,451990/1227/sys/src/9/ss/mmu.c:40,50 (short | long | prev | next)
1990/1226    
	/* don't set m->pidhere[*tp] because we're only writing U entry */ 
	tlbphys = PPN(p->upage->pa)|PTEVALID|PTEWRITE|PTEKERNEL|PTEMAINMEM; 
	putcontext(tp-1); 
1990/1227    
	/* 
	 * putw4(USERADDR, tlbphys) might be good enough but 
	 * there is that fuss in pexit/pwait() copying between 
	 * u areas and that might surprise any cache entries 
	 */ 
1990/1226    
	putpmeg(USERADDR, tlbphys); 
1990/1223    
	u = (User*)USERADDR; 
1990/1226    
} 
1990/1226/sys/src/9/ss/mmu.c:64,691990/1227/sys/src/9/ss/mmu.c:69,75
1990/1226    
	m->pidproc[i] = p; 
	m->lastpid = i; 
print("new context %d\n", i); 
1990/1227    
	putcontext(i-1); 
1990/1223    
	/* 
1990/1226    
	 * kludge: each context is allowed 2 pmegs, one for text and one for stack 
1990/1223    
	 */ 
1990/1226/sys/src/9/ss/mmu.c:128,1381990/1227/sys/src/9/ss/mmu.c:134,143
1990/1226    
		/* 
		 * Invalidate user addresses 
		 */ 
/* 
		for(l=UZERO; l<KZERO; l+=BY2SEGM) 
1990/1227    
 
		for(l=UZERO; l<(KZERO&VAMASK); l+=BY2SEGM) 
1990/1226    
			putsegm(l, INVALIDPMEG); 
*/ 
putsegm(0x0000, INVALIDPMEG); 
1990/1227    
 
1990/1226    
		/* 
		 * One segment for screen 
		 */ 
1990/1226/sys/src/9/ss/mmu.c:168,1761990/1227/sys/src/9/ss/mmu.c:173,178
1990/1226    
	putcontext(0); 
1990/1223    
} 
 
1990/1226    
                 
                 
                 
1990/1223    
void 
putmmu(ulong tlbvirt, ulong tlbphys) 
{ 
1990/1226/sys/src/9/ss/mmu.c:200,2051990/1227/sys/src/9/ss/mmu.c:202,222
1990/1223    
} 
 
void 
1990/1227    
putpmeg(ulong virt, ulong phys) 
{ 
	int i; 
 
	virt &= VAMASK; 
	virt &= ~(BY2PG-1); 
	/* 
	 * Flush old entries from cache 
	 */ 
	for(i=0; i<0x100; i++) 
		putwD(virt+(i<<4), 0); 
	putw4(virt, phys); 
} 
 
void 
1990/1223    
flushmmu(void) 
{ 
1990/1226    
	splhi(); 
1990/1226/sys/src/9/ss/mmu.c:233,2391990/1227/sys/src/9/ss/mmu.c:250,255
1990/1223    
	KMap *k; 
1990/1226    
	int i; 
1990/1223    
 
1990/1226    
print("low pmeg %d\n", kmapalloc.lowpmeg); 
1990/1223    
	kmapalloc.free = 0; 
1990/1226    
	k = kmapalloc.arena; 
	for(i=0; i<(IOEND-IOSEGM)/BY2PG; i++,k++){ 
1990/1226/sys/src/9/ss/mmu.c:243,2491990/1227/sys/src/9/ss/mmu.c:259,265
1990/1223    
} 
 
KMap* 
1990/1226    
kmap1(Page *pg, ulong flag) 
1990/1227    
kmappa(ulong pa, ulong flag) 
1990/1223    
{ 
	KMap *k; 
 
1990/1226/sys/src/9/ss/mmu.c:255,2671990/1227/sys/src/9/ss/mmu.c:271,283
1990/1223    
	} 
	kmapalloc.free = k->next; 
	unlock(&kmapalloc); 
	k->pa = pg->pa; 
1990/1227    
	k->pa = pa; 
1990/1226    
	/* 
	 * Cache is virtual and a pain to deal with. 
	 * Must avoid having the same entry in the cache twice, so 
	 * must use NOCACHE or else extreme cleverness elsewhere. 
	 */ 
	putpmeg(k->va, PPN(k->pa)|PTEVALID|PTEKERNEL|PTEWRITE|PTENOCACHE|flag); 
1990/1227    
	putpmeg(k->va, PPN(pa)|PTEVALID|PTEKERNEL|PTEWRITE|PTENOCACHE|flag); 
1990/1223    
	return k; 
} 
 
1990/1226/sys/src/9/ss/mmu.c:268,2741990/1227/sys/src/9/ss/mmu.c:284,290
1990/1226    
KMap* 
kmap(Page *pg) 
{ 
	return kmap1(pg, PTEMAINMEM); 
1990/1227    
	return kmappa(pg->pa, PTEMAINMEM); 
1990/1226    
} 
 
1990/1223    
void 


source code copyright © 1990-2005 Lucent Technologies; see license
Plan 9 distribution
comments to russ cox (rsc@swtch.com)