1991/0209/power/trap.c (diff list | history)

1991/0209/sys/src/9/power/trap.c:175,181 – 1991/0212/sys/src/9/power/trap.c:175,182 (short | long | prev | next)
1990/0227		void
1991/0209		intr(Ureg *ur)
1990/0227		{ int i, pend;
1991/0212		int i, any; uchar pend, npend;
1990/0227		long v;
1991/0209		ulong cause;
1990/0227
1991/0209/sys/src/9/power/trap.c:189,200 – 1991/0212/sys/src/9/power/trap.c:190,202
1990/0227		cause &= ~INTR1; } if(cause & INTR5){
1991/0212		any = 0;
1990/0227		if(!(*MPBERR1 & (1<<8))){
1990/0911		print("MP bus error %lux %lux\n", *MPBERR0, *MPBERR1);
1990/0227		*MPBERR0 = 0; i = *SBEADDR;
1990/1214		USED(i);
1991/0212		any = 1;
1990/0227		} /*
1991/0209/sys/src/9/power/trap.c:201,207 – 1991/0212/sys/src/9/power/trap.c:203,209
1990/0227		* directions from IO2 manual * 1. clear all IO2 masks */ *IO2CLRMASK = 0xff;
1991/0212		*IO2CLRMASK = 0xff000000;
1990/0227		/* * 2. wait for interrupt in progress
1991/0209/sys/src/9/power/trap.c:212,218 – 1991/0212/sys/src/9/power/trap.c:214,220
1990/0227		/* * 3. read pending interrupts */ pend = SBCCREG->fintpending & 0xff;
1991/0212		npend = pend = SBCCREG->fintpending;
1990/0227		/* * 4. clear pending register
1991/0209/sys/src/9/power/trap.c:223,229 – 1991/0212/sys/src/9/power/trap.c:225,230
1990/0227		/* * 5a. process lance, scsi */
1990/0907		loop:
1990/0227		if(pend & 1) { v = INTVECREG->i[0].vec;
1990/0907		if(!(v & (1<<12))){
1991/0209/sys/src/9/power/trap.c:230,237 – 1991/0212/sys/src/9/power/trap.c:231,241
1990/0907		print("io2 mp bus error %d %lux %lux\n", 0, *MPBERR0, *MPBERR1); *MPBERR0 = 0;
1991/0212		any = 1;
1990/0907		}
1990/0911		if(ioid < IO3R1){
1991/0212		if(!(v & 7)) any = 1;
1990/0907		if(!(v & (1<<2))) lanceintr(); if(!(v & (1<<1)))
1991/0209/sys/src/9/power/trap.c:238,244 – 1991/0212/sys/src/9/power/trap.c:242,250
1990/0907		lanceparity(); if(!(v & (1<<0))) print("SCSI interrupt\n");
1990/0911		} else {
1991/0212		}else{ if(v & 7) any = 1;
1990/0907		if(v & (1<<2))
1990/0911		lanceintr();
1990/0907		if(v & (1<<1))
1991/0209/sys/src/9/power/trap.c:249,274 – 1991/0212/sys/src/9/power/trap.c:255,286
1990/0227		} /* * 5b. process vme * i bet i can guess your level
1991/0212		* i can guess your level
1990/0227		*/ pend >>= 1; for(i=1; pend; i++) {
1991/0212		for(i=1; pend>>=1; i++){
1990/0227		if(pend & 1) { v = INTVECREG->i[i].vec;
1990/0907		if(!(v & (1<<12))){ print("io2 mp bus error %d %lux %lux\n", i, *MPBERR0, *MPBERR1);
1991/0212		print("io2 mp bus error %d %lux %lux\n", i, *MPBERR0, *MPBERR1);
1990/0907		*MPBERR0 = 0; }
1990/0227		v &= 0xff; (*vmevec[v])(v);
1991/0212		any = 1;
1990/0227		} pend >>= 1; } /*
1991/0212		* if nothing else, assume bus error */ if(!any){ print("bogus intr lvl 5 pend %lux on %d\n", npend, m->machno); delay(100); } /*
1990/0227		* 6. re-enable interrupts */
1990/0907		*IO2SETMASK = 0xff;
1991/0212		*IO2SETMASK = 0xff000000;
1990/0227		cause &= ~INTR5; } if(cause)