1991/0209/power/trap.c (diff list | history)

1991/0115/sys/src/9/power/trap.c:12,18 – 1991/0209/sys/src/9/power/trap.c:12,17 (short | long | prev | next)
1990/0227		*/ void (*vmevec[256])(int); void notify(Ureg*); void noted(Ureg**); void rfnote(Ureg**);
1991/0115/sys/src/9/power/trap.c:87,93 – 1991/0209/sys/src/9/power/trap.c:86,91
1990/0227		u->p->pc = ur->pc; /* BUG */ switch(ecode){ case CINT: m->intrp = 0; if(u && u->p->state==Running){ if(u->p->fpstate == FPactive) { if(ur->cause & INTR3){ /* FP trap */
1991/0115/sys/src/9/power/trap.c:100,113 – 1991/0209/sys/src/9/power/trap.c:98,105
1990/0227		if(ecode == FPEXC) goto Default; } m->intr = intr; m->cause = ur->cause;
1990/0731		m->pc = ur->pc;
1990/0227		if(ur->cause & INTR2) m->intrp = u->p; sched(); }else
1990/0731		intr(ur->cause, ur->pc);
1991/0209		} intr(ur);
1990/0227		break; case CTLBM:
1991/0115/sys/src/9/power/trap.c:181,194 – 1991/0209/sys/src/9/power/trap.c:173,187
1990/0227		} void
1990/0731		intr(ulong cause, ulong pc)
1991/0209		intr(Ureg *ur)
1990/0227		{ int i, pend; long v;
1991/0209		ulong cause;
1990/0227		cause &= INTR5|INTR4|INTR3|INTR2|INTR1;
1991/0209		cause = ur->cause&(INTR5|INTR4|INTR3|INTR2|INTR1);
1990/0227		if(cause & (INTR2|INTR4)){
1990/0731		clock(cause, pc);
1991/0209		clock(ur);
1990/0227		cause &= ~(INTR2|INTR4); } if(cause & INTR1){