1991/0709/pc/trap.c (diff list | history)

1991/0706/sys/src/9/pc/trap.c:7,12 – 1991/0709/sys/src/9/pc/trap.c:7,28 (short | long | prev | next)
1991/0703		#include "ureg.h"
1991/0613		/*
1991/0709		* 8259 interrupt controllers */ enum { Int0ctl= 0x20, /* control port (ICW1, OCW2, OCW3) */ Int0aux= 0x21, /* everything else (ICW2, ICW3, ICW4, OCW1) */ Int1ctl= 0xA0, /* control port */ Int1aux= 0xA1, /* everything else (ICW2, ICW3, ICW4, OCW1) */ EOI= 0x20, /* non-specific end of interrupt */ }; int int0mask = 7; /* interrupts enabled for first 8259 */ int int1mask = 7; /* interrupts enabled for second 8259 */ /*
1991/0614		* trap/interrupt gates
1991/0613		*/
1991/0703		Segdesc ilt[256];
1991/0706/sys/src/9/pc/trap.c:25,30 – 1991/0709/sys/src/9/pc/trap.c:41,54
1991/0703		ilt[v].d1 &= ~SEGTYPE; ilt[v].d1 |= type; ivec[v] = r;
1991/0709		/* * enable corresponding interrupt in 8259 */ if((v&~0x7) == Int0vec){ int0mask &= ~(1<<(v&7)); outb(Int0aux, int0mask); }
1991/0703		}
1991/0614		/*
1991/0706/sys/src/9/pc/trap.c:75,95 – 1991/0709/sys/src/9/pc/trap.c:99,116
1991/0703		lidt(ilt, sizeof(ilt));
1991/0704		/* * Set up the 8259 interrupt processor #1. * Make 8259 interrupts starting at vector I8259vec. * * N.B. This is all magic to me. It comes from the * IBM technical reference manual. I just * changed the vector.
1991/0709		* Set up the first 8259 interrupt processor. * Make 8259 interrupts start at CPU vector Int0vec. * Set the 8259 as master with edge triggered * input with fully nested interrupts.
1991/0704		*/
1991/0705		outb(Int0ctl, 0x11); /* ICW1 - edge, master, ICW4 */ outb(Int0aux, Int0vec); /* ICW2 - interrupt vector */
1991/0709		outb(Int0ctl, 0x11); /* ICW1 - edge triggered, master, ICW4 will be sent */ outb(Int0aux, Int0vec); /* ICW2 - interrupt vector offset */
1991/0705		outb(Int0aux, 0x04); /* ICW3 - master level 2 */ outb(Int0aux, 0x01); /* ICW4 - master, 8086 mode */ outb(Int0aux, 0x00); /* mask - all enabled */
1991/0709		outb(Int0aux, 0x01); /* ICW4 - 8086 mode, not buffered */
1991/0703		}
1991/0614		/*
1991/0703		* All traps
1991/0614		*/
1991/0706/sys/src/9/pc/trap.c:98,103 – 1991/0709/sys/src/9/pc/trap.c:119,132
1991/0703		if(ur->trap>=256 || ivec[ur->trap] == 0) panic("bad trap type %d\n", ur->trap);
1991/0709		/* * call the trap routine */
1991/0703		(*ivec[ur->trap])(ur);
1991/0706		INT0ENABLE;
1991/0709		/* * tell the 8259 that we're done with the * highest level interrupt */ outb(Int0ctl, EOI);
1991/0614		}