1991/0803/pc/devuart.c (diff list | history)

1991/0801/sys/src/9/pc/devuart.c:37,43 – 1991/0803/sys/src/9/pc/devuart.c:37,43 (short | long | prev | next)
1991/0801		Loop= (1<<4), /* loop bask */ Lstat= 5, /* line status */ Inready=(1<<0), /* receive buffer full */ Outbusy=(1<<5), /* output buffer full */
1991/0803		Outready=(1<<5), /* output buffer full */
1991/0801		Mstat= 6, /* modem status */ Scratch=7, /* scratchpad */ Dlsb= 0, /* divisor lsb */
1991/0801/sys/src/9/pc/devuart.c:88,94 – 1991/0803/sys/src/9/pc/devuart.c:88,94
1991/0801		{ ulong brconst; brconst = (UartFREQ+8*rate-1)/16*rate;
1991/0803		brconst = (UartFREQ+8*rate-1)/(16*rate);
1991/0801		uartwrreg(up, Format, Dra); uartwrreg(up, Dmsb, (brconst>>8) & 0xff);
1991/0801/sys/src/9/pc/devuart.c:178,183 – 1991/0803/sys/src/9/pc/devuart.c:178,184
1991/0801		{ Uart *up = cq->ptr; int st, ch, x;
1991/0803		int tries;
1991/0801		x = splhi(); lock(cq);
1991/0801/sys/src/9/pc/devuart.c:187,193 – 1991/0803/sys/src/9/pc/devuart.c:188,195
1991/0801		print("<start %2.2ux>", ch);/**/ if(ch >= 0){ up->printing = 1; while(uartrdreg(up, Lstat) & Outbusy)
1991/0803		for(tries = 0; tries<10000 && !(uartrdreg(up, Lstat)&Outready); tries++)
1991/0801		; outb(up->port + Data, ch); }
1991/0801/sys/src/9/pc/devuart.c:202,212 – 1991/0803/sys/src/9/pc/devuart.c:204,216
1991/0801		void uartintr(Uart *up) { int s; int ch; IOQ *cq;
1991/0803		int s;
1991/0801		switch(uartrdreg(up, Istat)){
1991/0803		s = uartrdreg(up, Istat); print("uartintr %lux\n", s); switch(s){
1991/0801		case 3: /* * get any input characters
1991/0801/sys/src/9/pc/devuart.c:227,236 – 1991/0803/sys/src/9/pc/devuart.c:231,241
1991/0801		/* * send next output character */ if((s & Outbusy)==0){
1991/0803		if(uartrdreg(up, Lstat)&Outready){
1991/0801		cq = up->oq; lock(cq); ch = getc(cq);
1991/0803		print("<cont %2.2ux>", ch);/**/
1991/0801		if(ch < 0){ up->printing = 0; wakeup(&cq->r);
1991/0801/sys/src/9/pc/devuart.c:270,275 – 1991/0803/sys/src/9/pc/devuart.c:275,281
1991/0801		up->iq->ptr = up; up->sticky[Iena] |= Ircv; }
1991/0803		up->sticky[Iena] |= (1<<2) | (1<<3);
1991/0801		/* * turn on interrupts
1991/0801/sys/src/9/pc/devuart.c:465,471 – 1991/0803/sys/src/9/pc/devuart.c:471,476
1991/0801		loop: while ((n = cangetc(cq)) == 0){ print("uart0 sleeping/n"); sleep(&cq->r, cangetc, cq); } qlock(up);
1991/0801/sys/src/9/pc/devuart.c:505,510 – 1991/0803/sys/src/9/pc/devuart.c:510,518
1991/0801		uartreset(void) { Uart *up;
1991/0803		if(serial(0) < 0) print("can't turn on power\n");
1991/0801		uartsetup(); for(up = uart; up < &uart[2]; up++){