1991/1113/pc/main.c (diff list | history)

1991/1113/sys/src/9/pc/main.c:8,17 – 1991/1210/sys/src/9/pc/main.c:8,19 (short | long | prev | next)
1991/0716		#include "init.h"
1991/0629
1991/0716		extern long edata;
1991/1210		int machtype;
1991/0711
1991/0716		void
1991/0702		main(void)
1991/0625		{
1991/1210		ident();
1991/0827		meminit();
1991/0711		machinit();
1991/1113		active.exiting = 0;
1991/1113/sys/src/9/pc/main.c:42,47 – 1991/1210/sys/src/9/pc/main.c:44,61
1991/0712		}
1991/0706
1991/0716		void
1991/1210		ident(void) { char *id = (char*)(ROMBIOS + 0xFF40); /* check for a safari (tres special) */ if(strncmp(id, "AT&TNSX", 7) == 0) machtype = Attnsx; else machtype = At; } void
1991/0716		machinit(void)
1991/0712		{
1991/0716		int n;
1991/1113/sys/src/9/pc/main.c:342,383 – 1991/1210/sys/src/9/pc/main.c:356,381
1991/0712		}
1991/0906		/*
1991/0803		* special stuff for 80c51 power management and headland system controller
1991/1210		* the following functions all are slightly different from * PC to PC.
1991/0803		*/ enum { /* * system control port */ Head= 0x92, /* control port */ Reset= (1<<0), /* reset the 386 */ A20ena= (1<<1), /* enable address line 20 */ /* * power management unit ports */ Pmudata= 0x198,                  Pmucsr= 0x199,
1991/0806		Busy= 0x1,                  /* * configuration port */ Pconfig= 0x3F3,
1991/0803		};                  /* * enable address bit 20 */
1991/1210		/* enable address bit 20 (extended memory) */
1991/0803		void
1991/0827		meminit(void)
1991/0803		{
1991/0827		outb(Head, A20ena); /* enable memory address bit 20 */
1991/1210		switch(machtype){ case Attnsx: heada20(); /* via headland chip */ break; case At: i8042a20(); /* via keyboard controller */ break; }
1991/0803		} /* * reset the chip
1991/1210		* reset the i387 chip
1991/0803		*/ void exit(void)
1991/1113/sys/src/9/pc/main.c:386,513 – 1991/1210/sys/src/9/pc/main.c:384,474
1991/0803		u = 0; print("exiting\n"); outb(Head, Reset);
1991/1210		switch(machtype){ case Attnsx: headreset(); /* via headland chip */ break; case At: i8042reset(); /* via keyboard controller */ break; }
1991/0803		} /* * return when pmu ready
1991/1210		* set cpu speed * 0 == low speed * 1 == high speed
1991/0803		*/ static int pmuready(void)
1991/1210		int cpuspeed(int speed)
1991/0803		{ int tries;                  for(tries = 0; (inb(Pmucsr) & Busy); tries++) if(tries > 1000) return -1; return 0;
1991/1210		switch(machtype){ case Attnsx: return pmucpuspeed(speed); default: return 0; }
1991/0803		} /* * return when pmu busy
1991/1210		* f == frequency (Hz) * d == duration (ms)
1991/0803		*/ static int pmubusy(void)
1991/1210		void buzz(int f, int d)
1991/0803		{ int tries;                  for(tries = 0; !(inb(Pmucsr) & Busy); tries++) if(tries > 1000) return -1; return 0;
1991/1210		switch(machtype){ case Attnsx: pmubuzz(f, d); break; default: break; }
1991/0803		} /* * set a bit in the PMU
1991/1210		* each bit in val stands for a light
1991/0803		*/
1991/0809		Lock pmulock;
1991/0803		int pmuwrbit(int index, int bit, int pos)
1991/1210		void lights(int val)
1991/0803		{
1991/0809		lock(&pmulock);
1991/0803		outb(Pmucsr, 0x02); /* next is command request */
1991/0809		if(pmuready() < 0){ unlock(&pmulock);
1991/0803		return -1;
1991/1210		switch(machtype){ case Attnsx: pmulights(val); break; default: break;
1991/0809		}
1991/0803		outb(Pmudata, (2<<4) | index); /* send write bit command */ outb(Pmucsr, 0x01); /* send available */
1991/0809		if(pmubusy() < 0){ unlock(&pmulock);
1991/0803		return -1;
1991/0809		}
1991/0803		outb(Pmucsr, 0x01); /* next is data */
1991/0809		if(pmuready() < 0){ unlock(&pmulock);
1991/0803		return -1;
1991/0809		}
1991/0803		outb(Pmudata, (bit<<3) | pos); /* send bit to write */ outb(Pmucsr, 0x01); /* send available */
1991/0809		if(pmubusy() < 0){ unlock(&pmulock);
1991/0803		return -1;
1991/0809		} unlock(&pmulock);
1991/0810		return 0;
1991/0803		} /*
1991/0913		* power to serial port * onoff == 0 means on
1991/0803		* onoff == 1 means off
1991/1210		* onoff == 1 means on * onoff == 0 means off
1991/0803		*/ int serial(int onoff) { return pmuwrbit(1, onoff, 6);
1991/1210		switch(machtype){ case Attnsx: return pmuserial(onoff); default: return 0; }
1991/0803		}
1991/1001		/* * power to modem * onoff == 0 means on * onoff == 1 means off
1991/1210		* onoff == 1 means on * onoff == 0 means off
1991/1001		*/ int modem(int onoff) { if(pmuwrbit(1, onoff, 0)<0) return -1; return pmuwrbit(1, 1^onoff, 5); }
1991/1029		/* * CPU speed * onoff == 0 means 2 MHZ * onoff == 1 means 20 MHZ */ int cpuspeed(int speed) { return pmuwrbit(0, speed, 0); }
1991/0913		void buzz(int f, int d)
1991/0803		{
1991/0913		static Rendez br; static QLock bl;                  qlock(&bl); pmuwrbit(0, 0, 6); tsleep(&br, return0, 0, d); pmuwrbit(0, 1, 6); qunlock(&bl);
1991/0803		}
1991/0913		void lights(int val)
1991/0803		{
1991/0913		pmuwrbit(0, (val&1), 4); /* owl */ pmuwrbit(0, ((val>>1)&1), 1); /* mail */
1991/1113		}                  void owl(int val) { pmuwrbit(0, (val&1), 4); /* owl */
1991/1210		switch(machtype){ case Attnsx: return pmumodem(onoff); default: return 0; }
1991/0803		}