1991/1113/power/clock.c (diff list | history)

1991/1113/sys/src/9/power/clock.c:1,132 – 1991/1114/sys/src/9/power/clock.c:1,130 (short | long | prev | next)
1990/0227		#include "u.h" #include "lib.h" #include "mem.h" #include "dat.h" #include "fns.h" #include "io.h" #include "ureg.h" void delay(int ms) { ulong t, *p; int i; ms *= 7000; /* experimentally determined */ for(i=0; i<ms; i++) ; } /* * AMD 82C54 timer * * ctr2 is clocked at 3.6864 MHz. * ctr2 output clocks ctr0 and ctr1. * ctr0 drives INTR2. ctr1 drives INTR4. * To get 100Hz, 36864==9*4096=36*1024 so clock ctr2 every 1024 and ctr0 every 36. */ struct Timer{ uchar cnt0, junk0[3]; uchar cnt1, junk1[3]; uchar cnt2, junk2[3]; uchar ctl, junk3[3]; };
1990/0731
1990/0227		#define TIME0 (36*MS2HZ/10)
1990/0731		#define TIME1 0xFFFFFFFF /* profiling disabled */
1990/0227		#define TIME2 1024 #define CTR(x) ((x)<<6) /* which counter x */ #define SET16 0x30 /* lsbyte then msbyte */ #define MODE2 0x04 /* interval timer */
1990/0731
1990/0227		void clockinit(void) { Timer *t; int i; t = TIMERREG; t->ctl = CTR(2)|SET16|MODE2; t->cnt2 = TIME2&0xFF; t->cnt2 = (TIME2>>8)&0xFF; t->ctl = CTR(1)|SET16|MODE2; t->cnt1 = TIME1&0xFF; t->cnt1 = (TIME1>>8)&0xFF; t->ctl = CTR(0)|SET16|MODE2; t->cnt0 = TIME0; t->cnt0 = (TIME0>>8)&0xFF; i = *CLRTIM0;
1990/1214		USED(i);
1990/0227		i = *CLRTIM1;
1990/1214		USED(i);
1990/0227		m->ticks = 0; }
1990/0731
1990/0227		void
1991/0209		clock(Ureg *ur)
1990/0227		{
1991/1112		int i, nrun = 0;
1990/0227		Proc *p;
1991/0209		if(ur->cause & INTR2){
1990/0227		i = *CLRTIM0;
1990/1214		USED(i);
1990/0227		m->ticks++; if(m->machno == 0){ p = m->proc;
1991/1112		if(p) { nrun++;
1990/0227		p->time[p->insyscall]++;
1991/1112		}
1990/0227		for(i=1; i<conf.nmach; i++){ if(active.machs & (1<<i)){ p = MACHP(i)->proc;
1991/1112		if(p) {
1990/0227		p->time[p->insyscall]++;
1991/1112		nrun++; }
1990/0227		} }
1991/1112		nrun = (nrdy+nrun)*1000;
1991/1113		m->load = (m->load*19+nrun)/20;
1990/0227		}
1991/0607		duartslave();
1990/0227		if(active.exiting && active.machs&(1<<m->machno)){ print("someone's exiting\n"); exit(); }
1990/1211		checkalarms();
1991/1011		kproftimer(ur->pc);
1991/0215		if(u && (ur->status&IEP) && u->p && u->p->state==Running){
1991/0614		if(anyready()){ if(u->p->hasspin) u->p->hasspin = 0; /* just in case */ else sched(); }
1991/0710		if(ur->status & KUP){
1991/1114		if(ur->status & KUP)
1991/0710		(*(ulong*)(USTKTOP-BY2WD)) += TK2MS(1); /* profiling clock */
1991/1110		notify(ur);
1991/0710		}
1991/0209		}
1990/0227		return; }
1991/0209		if(ur->cause & INTR4){
1990/0731		extern ulong start;
1990/0227		i = *CLRTIM1;
1990/1214		USED(i);
1990/0227		return; } }