| plan 9 kernel history: overview | file list | diff list |
1992/0418/pc/vga.c (diff list | history)
| 1992/0418/sys/src/9/pc/vga.c:59,65 – 1992/0423/sys/src/9/pc/vga.c:59,65 (short | long | prev | next) | ||
| 1991/1113 | typedef struct VGAmode VGAmode; struct VGAmode { | |
| 1992/0423 | uchar general[2]; | |
| 1991/1113 | uchar sequencer[5]; uchar crt[0x19]; uchar graphics[9]; | |
| 1992/0418/sys/src/9/pc/vga.c:73,79 – 1992/0423/sys/src/9/pc/vga.c:73,79 | ||
| 1991/1113 | VGAmode mode12 = { /* general */ | |
| 1992/0423 | 0xe3, 0x00, /* 0x70, 0x04, these are read-only */ | |
| 1991/1113 | /* sequence */ 0x03, 0x01, 0x0f, 0x00, 0x06, /* crt */ | |
| 1992/0418/sys/src/9/pc/vga.c:96,102 – 1992/0423/sys/src/9/pc/vga.c:96,102 | ||
| 1992/0414 | VGAmode mode12 = { /* general */ | |
| 1992/0423 | 0xe7, 0x00, /* 0x70, 0x04, these are read-only */ | |
| 1992/0414 | /* sequence */ 0x03, 0x01, 0x0f, 0x00, 0x06, /* crt */ | |
| 1992/0418/sys/src/9/pc/vga.c:109,115 – 1992/0423/sys/src/9/pc/vga.c:109,115 | ||
| 1992/0414 | 0xff, /* attribute */ | |
| 1992/0418 | 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, | |
| 1992/0423 | 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x3f, | |
| 1992/0418 | 0x01, 0x10, 0x0f, 0x00, 0x00, | |
| 1992/0414 | }; #endif | |
| 1992/0418/sys/src/9/pc/vga.c:119,125 – 1992/0423/sys/src/9/pc/vga.c:119,124 | ||
| 1991/0724 | void | |
| 1991/1113 | genout(int reg, int val) { | |
| 1992/0418 |
| |
| 1991/1113 | if(reg == 0) outb(EMISCW, val); else if (reg == 1) | |
| 1992/0418/sys/src/9/pc/vga.c:131,137 – 1992/0423/sys/src/9/pc/vga.c:130,135 | ||
| 1992/0414 | /* * needed or the screen goes blank on an ultra VGA card */ | |
| 1992/0418 |
| |
| 1991/0724 | outb(SRX, reg); outb(SR, val); } | |
| 1992/0418/sys/src/9/pc/vga.c:147,161 – 1992/0423/sys/src/9/pc/vga.c:145,165 | ||
| 1992/0414 | /* * if this print is missing, we are left with a blank white screen. */ | |
| 1991/0727 | inb(0x3DA); | |
| 1991/1211 |
| |
| 1992/0423 | if (reg <= 0xf) { outb(ARW, reg | 0x0); outb(ARW, val); inb(0x3DA); outb(ARW, reg | 0x20); } else { outb(ARW, reg | 0x20); outb(ARW, val); } | |
| 1991/0727 | } | |
| 1992/0423 | ||
| 1991/0727 | void crout(int reg, int val) { | |
| 1992/0418 |
| |
| 1991/0727 | outb(CRX, reg); outb(CR, val); } | |
| 1992/0418/sys/src/9/pc/vga.c:203,209 – 1992/0423/sys/src/9/pc/vga.c:207,251 | ||
| 1991/1113 | arout(i, v->attribute[i]); | |
| 1991/0928 | } | |
| 1992/0423 | #ifdef VGATROUBLE | |
| 1991/0727 | void | |
| 1992/0423 | dumpmodes(VGAmode *v) { int i; print("general registers: %02x %02x %02x %02x\n", inb(0x3cc), inb(0x3ca), inb(0x3c2), inb(0x3da)); print("sequence registers: "); for(i = 0; i < sizeof(v->sequencer); i++) { outb(SRX, i); print(" %02x", inb(SR)); } print("\nCRT registers: "); for(i = 0; i < sizeof(v->crt); i++) { outb(CRX, i); print(" %02x", inb(CR)); } print("\nGraphics registers: "); for(i = 0; i < sizeof(v->graphics); i++) { outb(GRX, i); print(" %02x", inb(GR)); } print("\nAttribute registers: "); for(i = 0; i < sizeof(v->attribute); i++) { inb(0x3DA); outb(ARW, i | 0x20); print(" %02x", inb(ARR)); } print("\nPEL Mask Register = %02x\n\n", inb(0x3c6)&0xff); } #endif void | |
| 1991/0730 | screeninit(void) | |
| 1991/0723 | { | |
| 1991/0727 | int i, j, k; | |
| 1992/0418/sys/src/9/pc/vga.c:226,232 – 1992/0423/sys/src/9/pc/vga.c:268,273 | ||
| 1991/0730 | out.pos.x = MINX; out.pos.y = 0; out.bwid = defont0.info[' '].width; | |
| 1992/0418 |
| |
| 1991/0723 | } | |
| 1991/0727 | ||
| 1991/0730 | void | |