| plan 9 kernel history: overview | file list | diff list |
1992/0923/pc/clock.c (diff list | history)
| 1992/0922/sys/src/9/pc/clock.c:16,47 – 1992/0923/sys/src/9/pc/clock.c:16,51 (short | long | prev | next) | ||
|
rename constants; commenting; rewrite delay to use delayloop, set during clockinit.
BUG fix? handle negative delays properly.
rsc Fri Mar 4 12:44:25 2005 | ||
| 1991/0709 | T2cntr= 0x42, /* ... */ Tmode= 0x43, /* mode port */ | |
| 1991/0705 | ||
| 1991/0709 |
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| 1992/0922 |
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| 1991/0709 |
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| 1992/0923 | /* commands */ Latch0= 0x00, /* latch counter 0's value */ Load0= 0x30, /* load counter 0 with 2 bytes */ /* modes */ Square= 0x36, /* perioic square wave */ Freq= 1193182, /* Real clock frequency */ | |
| 1991/0705 | }; | |
| 1992/0923 | static ulong delayloop = 1000; | |
| 1991/0719 | /* | |
| 1992/0923 | * delay for l milliseconds more or less. delayloop is set by * clockinit() to match the actual CPU speed. | |
| 1991/0719 | */ void delay(int l) { | |
| 1992/0923 | ulong i; | |
| 1991/0719 |
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| 1992/0923 | while(l-- > 0) for(i=0; i < delayloop; i++) | |
| 1991/0719 | ; | |
| 1991/0704 | void clockinit(void) { | |
| 1992/0922 |
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| 1992/0923 | ulong x, y; /* change in counter */ | |
| 1992/0922 | ||
| 1991/0709 | /* * set vector for clock interrupts | |
| 1992/0922/sys/src/9/pc/clock.c:51,68 – 1992/0923/sys/src/9/pc/clock.c:55,82 | ||
| 1991/0709 | /* * make clock output a square wave with a 1/HZ period */ | |
| 1992/0923 | outb(Tmode, Load0|Square); | |
| 1991/0709 | outb(T0cntr, (Freq/HZ)); /* low byte */ outb(T0cntr, (Freq/HZ)>>8); /* high byte */ | |
| 1992/0922 | /* | |
| 1992/0923 | * measure time for delay(10) with current delayloop count | |
| 1992/0922 | */ | |
| 1992/0923 | x = inb(T0cntr); x |= inb(T0cntr)<<8; delay(10); outb(Tmode, Latch0); y = inb(T0cntr); y |= inb(T0cntr)<<8; x -= y; /* * fix count, the factor of 2 is a hack */ delayloop = (delayloop*1193*10)/x; if(delayloop == 0) delayloop = 1; | |
| 1991/0704 | } | |
| 1991/0705 | void | |