1993/0212/pc/l.s (diff list | history)

pc/l.s on 1991/0625
1991/0625		#include "mem.h"
1991/0614
1991/0809		#define OP16 BYTE $0x66
1991/0626		/*
1991/0629		* about to walk all over ms/dos - turn off interrupts
1991/0614		*/
1991/0702		TEXT origin(SB),$0
1991/0629		CLI
1991/0625
1991/0715		#ifdef BOOT
1991/0629		/*
1991/0720		* This part of l.s is used only in the boot kernel. * It assumes that we are in real address mode, i.e., * that we look like an 8086. */ /*
1991/0715		* relocate everything to a half meg and jump there
1991/0629		* - looks wierd because it is being assembled by a 32 bit * assembler for a 16 bit world */ MOVL $0,BX INCL BX
1991/0715		SHLL $15,BX
1991/0629		MOVL BX,CX
1991/0715		MOVW BX,ES
1991/0629		MOVL $0,SI MOVL SI,DI
1991/1211		CLD; REP; MOVSL
1991/0715		/* JMPFAR 0X8000:$lowcore(SB) /**/
1991/0629		BYTE $0xEA
1991/0715		WORD $lowcore(SB) WORD $0X8000
1991/0625
1991/0629		TEXT lowcore(SB),$0
1991/0625
1991/0629		/* * now that we're in low core, update the DS */ MOVW BX,DS /* * goto protected mode */ /* MOVL tgdtptr(SB),GDTR /**/ BYTE $0x0f BYTE $0x01 BYTE $0x16
1991/0715		WORD $tgdtptr(SB)
1991/0627		MOVL CR0,AX ORL $1,AX MOVL AX,CR0 /*
1992/0425		* clear prefetch queue (weird code to avoid optimizations)
1991/0627		*/
1991/0629		CLC JCC flush MOVL AX,AX
1991/0627		flush:
1991/0629		/* * set all segs */ /* MOVW $SELECTOR(1, SELGDT, 0),AX /**/ BYTE $0xc7 BYTE $0xc0 WORD $SELECTOR(1, SELGDT, 0)
1991/0627		MOVW AX,DS MOVW AX,SS
1991/0629		MOVW AX,ES
1991/1214		MOVW AX,FS MOVW AX,GS
1991/0627
1991/0706		/* JMPFAR SELECTOR(2, SELGDT, 0):$mode32bit(SB) /**/
1991/0715		BYTE $0x66
1991/0629		BYTE $0xEA
1991/0715		LONG $mode32bit-KZERO(SB)
1991/0629		WORD $SELECTOR(2, SELGDT, 0)
1991/0627
1991/0629		TEXT mode32bit(SB),$0
1991/0715		#endif BOOT
1991/0629		/* * Clear BSS */
1991/0710		LEAL edata-KZERO(SB),SI MOVL SI,DI ADDL $4,DI
1991/0629		MOVL $0,AX MOVL AX,(SI)
1991/0710		LEAL end-KZERO(SB),CX
1991/0627		SUBL DI,CX SHRL $2,CX
1991/1211		CLD; REP; MOVSL
1991/0627
1991/0629		/*
1991/0710		* make a bottom level page table page that maps the first
1991/0711		* 16 meg of physical memory
1991/0710		*/ LEAL tpt-KZERO(SB),AX /* get phys addr of temporary page table */ ADDL $(BY2PG-1),AX /* must be page alligned */ ANDL $(~(BY2PG-1)),AX /* ... */
1991/0711		MOVL $(4*1024),CX /* pte's per page */ MOVL $((((4*1024)-1)<<PGSHIFT)|PTEVALID|PTEKERNEL|PTEWRITE),BX
1991/0710		setpte: MOVL BX,-4(AX)(CX*4)
1991/0711		SUBL $(1<<PGSHIFT),BX
1991/0710		LOOP setpte /* * make a top level page table page that maps the first
1991/0711		* 16 meg of memory to 0 thru 16meg and to KZERO thru KZERO+16meg
1991/0710		*/ MOVL AX,BX
1991/0711		ADDL $(4*BY2PG),AX ADDL $(PTEVALID|PTEKERNEL|PTEWRITE),BX
1991/0710		MOVL BX,0(AX)
1991/0711		MOVL BX,((((KZERO>>1)&0x7FFFFFFF)>>(2*PGSHIFT-1-4))+0)(AX) ADDL $BY2PG,BX MOVL BX,4(AX) MOVL BX,((((KZERO>>1)&0x7FFFFFFF)>>(2*PGSHIFT-1-4))+4)(AX) ADDL $BY2PG,BX MOVL BX,8(AX) MOVL BX,((((KZERO>>1)&0x7FFFFFFF)>>(2*PGSHIFT-1-4))+8)(AX) ADDL $BY2PG,BX MOVL BX,12(AX) MOVL BX,((((KZERO>>1)&0x7FFFFFFF)>>(2*PGSHIFT-1-4))+12)(AX)
1991/0710		/* * point processor to top level page & turn on paging */ MOVL AX,CR3 MOVL CR0,AX
1991/0711		ORL $0X80000000,AX
1991/0906		ANDL $~(0x8|0x2),AX /* TS=0, MP=0 */
1991/0710		MOVL AX,CR0 /*
1991/0717		* use a jump to an absolute location to get the PC into * KZERO. */ LEAL tokzero(SB),AX JMP* AX TEXT tokzero(SB),$0 /*
1991/0629		* stack and mach */ MOVL $mach0(SB),SP MOVL SP,m(SB) MOVL $0,0(SP) ADDL $(MACHSIZE-4),SP /* start stack under machine struct */ MOVL $0, u(SB)
1991/0622
1991/1211		/* * clear flags */ MOVL $0,AX PUSHL AX POPFL
1991/0629		CALL main(SB)
1991/0619
1991/0629		loop: JMP loop
1991/0619
1991/0629		GLOBL mach0+0(SB), $MACHSIZE GLOBL u(SB), $4 GLOBL m(SB), $4
1991/0711		GLOBL tpt(SB), $(BY2PG*6)
1991/0702		/* * gdt to get us to 32-bit/segmented/unpaged mode */ TEXT tgdt(SB),$0 /* null descriptor */ LONG $0 LONG $0 /* data segment descriptor for 4 gigabytes (PL 0) */ LONG $(0xFFFF) LONG $(SEGG|SEGB|(0xF<<16)|SEGP|SEGPL(0)|SEGDATA|SEGW) /* exec segment descriptor for 4 gigabytes (PL 0) */ LONG $(0xFFFF) LONG $(SEGG|SEGD|(0xF<<16)|SEGP|SEGPL(0)|SEGEXEC|SEGR) /* * pointer to initial gdt */ TEXT tgdtptr(SB),$0 WORD $(3*8)
1991/0710		LONG $tgdt-KZERO(SB)
1991/0702		/* * input a byte */ TEXT inb(SB),$0 MOVL p+0(FP),DX XORL AX,AX INB RET /*
1992/1211		* input a string of bytes from a port */ TEXT insb(SB),$0 MOVL p+0(FP),DX MOVL a+4(FP),DI MOVL c+8(FP),CX CLD; REP; INSB RET /*
1991/0702		* output a byte */ TEXT outb(SB),$0 MOVL p+0(FP),DX MOVL b+4(FP),AX OUTB
1992/1211		RET /* * output a string of bytes to a port */ TEXT outsb(SB),$0 MOVL p+0(FP),DX MOVL a+4(FP),SI MOVL c+8(FP),CX CLD; REP; OUTSB
1991/0809		RET /*
1992/0917		* input a short from a port
1992/0911		*/
1992/0917		TEXT ins(SB), $0
1992/0911		MOVL p+0(FP), DX XORL AX, AX
1992/0922		OP16; INL
1992/0911		RET /*
1991/0809		* input a string of shorts from a port */ TEXT inss(SB),$0
1992/0917
1991/0809		MOVL p+0(FP),DX MOVL a+4(FP),DI MOVL c+8(FP),CX
1991/1211		CLD; REP; OP16; INSL
1991/0809		RET /*
1992/0917		* input a string of longs from a port */ TEXT insl(SB),$0 MOVL p+0(FP),DX MOVL a+4(FP),DI MOVL c+8(FP),CX CLD; REP; INSL RET /* * output a short to a port */ TEXT outs(SB), $0 MOVL p+0(FP), DX MOVL s+4(FP), AX
1992/0922		OP16; OUTL
1992/0917		RET /*
1991/0809		* output a string of shorts to a port */ TEXT outss(SB),$0
1992/0917
1991/0809		MOVL p+0(FP),DX MOVL a+4(FP),SI MOVL c+8(FP),CX
1991/1211		CLD; REP; OP16; OUTSL
1992/0917		RET /* * output a string of longs to a port */ TEXT outsl(SB),$0 MOVL p+0(FP),DX MOVL a+4(FP),SI MOVL c+8(FP),CX CLD; REP; OUTSL
1991/0702		RET
1991/0703		/* * test and set */ TEXT tas(SB),$0 MOVL $0xdeadead,AX MOVL l+0(FP),BX XCHGL AX,(BX) RET /*
1991/0718		* routines to load/read various system registers
1991/0703		*/ GLOBL idtptr(SB),$6
1991/0718		TEXT putidt(SB),$0 /* interrupt descriptor table */
1991/0703		MOVL t+0(FP),AX MOVL AX,idtptr+2(SB) MOVL l+4(FP),AX MOVW AX,idtptr(SB) MOVL idtptr(SB),IDTR RET GLOBL gdtptr(SB),$6
1991/0718		TEXT putgdt(SB),$0 /* global descriptor table */
1991/0703		MOVL t+0(FP),AX MOVL AX,gdtptr+2(SB) MOVL l+4(FP),AX MOVW AX,gdtptr(SB) MOVL gdtptr(SB),GDTR RET
1991/0718		TEXT putcr3(SB),$0 /* top level page table pointer */
1991/0717		MOVL t+0(FP),AX MOVL AX,CR3 RET
1991/0718		TEXT puttr(SB),$0 /* task register */
1991/0717		MOVL t+0(FP),AX MOVW AX,TASK RET
1991/0906		TEXT getcr0(SB),$0 /* coprocessor bits */ MOVL CR0,AX RET
1991/0718		TEXT getcr2(SB),$0 /* fault address */ MOVL CR2,AX RET
1991/0906		#define FPOFF\ WAIT;\ MOVL CR0,AX;\
1992/0805		ORL $0x24,AX /* EM=1, NE=1 */;\
1991/0906		MOVL AX,CR0 #define FPON\ MOVL CR0,AX;\ ANDL $~0x4,AX /* EM=0 */;\ MOVL AX,CR0 TEXT fpoff(SB),$0 /* turn off floating point */ FPOFF RET TEXT fpinit(SB),$0 /* turn on & init the floating point */ FPON FINIT WAIT
1992/0728		PUSHW $0x033E
1991/0912		FLDCW 0(SP) /* ignore underflow/precision, signal others */ POPW AX WAIT
1991/0906		RET TEXT fpsave(SB),$0 /* save floating point state and turn off */ MOVL p+0(FP),AX WAIT FSAVE 0(AX) FPOFF RET TEXT fprestore(SB),$0 /* turn on floating point and restore regs */ FPON MOVL p+0(FP),AX FRSTOR 0(AX) WAIT RET
1991/0913		TEXT fpstatus(SB),$0 /* get floating point status */ FSTSW AX RET
1992/0806		TEXT fpenv(SB),$0 /* save floating point environment without waiting */ MOVL p+0(FP),AX FSTENV 0(AX) RET
1991/0703		/* * special traps */ TEXT intr0(SB),$0 PUSHL $0 PUSHL $0 JMP intrcommon TEXT intr1(SB),$0 PUSHL $0 PUSHL $1 JMP intrcommon TEXT intr2(SB),$0 PUSHL $0 PUSHL $2 JMP intrcommon TEXT intr3(SB),$0 PUSHL $0 PUSHL $3 JMP intrcommon TEXT intr4(SB),$0 PUSHL $0 PUSHL $4 JMP intrcommon TEXT intr5(SB),$0 PUSHL $0 PUSHL $5 JMP intrcommon TEXT intr6(SB),$0 PUSHL $0 PUSHL $6 JMP intrcommon TEXT intr7(SB),$0 PUSHL $0 PUSHL $7 JMP intrcommon TEXT intr8(SB),$0 PUSHL $8 JMP intrscommon TEXT intr9(SB),$0 PUSHL $0 PUSHL $9 JMP intrcommon TEXT intr10(SB),$0 PUSHL $10 JMP intrscommon TEXT intr11(SB),$0 PUSHL $11 JMP intrscommon TEXT intr12(SB),$0 PUSHL $12 JMP intrscommon TEXT intr13(SB),$0 PUSHL $13 JMP intrscommon TEXT intr14(SB),$0 PUSHL $14 JMP intrscommon TEXT intr15(SB),$0 PUSHL $0 PUSHL $15 JMP intrcommon TEXT intr16(SB),$0 PUSHL $0 PUSHL $16 JMP intrcommon
1991/0731		TEXT intr24(SB),$0 PUSHL $0 PUSHL $24 JMP intrcommon TEXT intr25(SB),$0 PUSHL $0 PUSHL $25 JMP intrcommon TEXT intr26(SB),$0 PUSHL $0 PUSHL $26 JMP intrcommon TEXT intr27(SB),$0 PUSHL $0 PUSHL $27 JMP intrcommon TEXT intr28(SB),$0 PUSHL $0 PUSHL $28 JMP intrcommon TEXT intr29(SB),$0 PUSHL $0 PUSHL $29 JMP intrcommon TEXT intr30(SB),$0 PUSHL $0 PUSHL $30 JMP intrcommon TEXT intr31(SB),$0 PUSHL $0 PUSHL $31
1991/0904		JMP intrcommon TEXT intr32(SB),$0 PUSHL $0 PUSHL $16 JMP intrcommon TEXT intr33(SB),$0 PUSHL $0 PUSHL $33 JMP intrcommon TEXT intr34(SB),$0 PUSHL $0 PUSHL $34 JMP intrcommon TEXT intr35(SB),$0 PUSHL $0 PUSHL $35 JMP intrcommon TEXT intr36(SB),$0 PUSHL $0 PUSHL $36 JMP intrcommon TEXT intr37(SB),$0 PUSHL $0 PUSHL $37 JMP intrcommon TEXT intr38(SB),$0 PUSHL $0 PUSHL $38 JMP intrcommon TEXT intr39(SB),$0 PUSHL $0 PUSHL $39
1991/0731		JMP intrcommon
1991/0710		TEXT intr64(SB),$0 PUSHL $0 PUSHL $64 JMP intrcommon
1991/0703		TEXT intrbad(SB),$0 PUSHL $0 PUSHL $0x1ff JMP intrcommon intrcommon: PUSHL DS
1991/0807		PUSHL ES
1991/1214		PUSHL FS PUSHL GS
1991/0703		PUSHAL
1991/0718		MOVL $(KDSEL),AX MOVW AX,DS
1991/0807		MOVW AX,ES
1991/0703		LEAL 0(SP),AX PUSHL AX CALL trap(SB) POPL AX POPAL
1991/1214		POPL GS POPL FS
1991/0807		POPL ES
1991/0703		POPL DS ADDL $8,SP /* error code and trap type */ IRETL intrscommon: PUSHL DS
1991/0807		PUSHL ES
1991/1214		PUSHL FS PUSHL GS
1991/0703		PUSHAL
1991/0718		MOVL $(KDSEL),AX MOVW AX,DS
1991/0807		MOVW AX,ES
1991/0703		LEAL 0(SP),AX PUSHL AX CALL trap(SB) POPL AX POPAL
1991/1214		POPL GS POPL FS
1991/0807		POPL ES
1991/0703		POPL DS ADDL $8,SP /* error code and trap type */ IRETL /*
1991/0716		* interrupt level is interrupts on or off
1991/0703		*/
1991/0704		TEXT spllo(SB),$0
1991/0710		PUSHFL POPL AX
1991/0703		STI
1991/0704		RET TEXT splhi(SB),$0
1991/0710		PUSHFL POPL AX
1991/0704		CLI
1991/0703		RET
1991/0705		TEXT splx(SB),$0
1991/0710		MOVL s+0(FP),AX PUSHL AX POPFL
1991/0705		RET
1991/0706		/*
1991/0710		* do nothing whatsoever till interrupt happens
1991/0706		*/ TEXT idle(SB),$0 HLT
1991/0710		RET /* * label consists of a stack pointer and a PC */ TEXT gotolabel(SB),$0 MOVL l+0(FP),AX MOVL 0(AX),SP /* restore sp */ MOVL 4(AX),AX /* put return pc on the stack */ MOVL AX,0(SP)
1991/0718		MOVL $1,AX /* return 1 */
1991/0710		RET TEXT setlabel(SB),$0 MOVL l+0(FP),AX MOVL SP,0(AX) /* store sp */ MOVL 0(SP),BX /* store return pc */ MOVL BX,4(AX)
1991/0718		MOVL $0,AX /* return 0 */
1991/0711		RET
1991/0718		/* * Used to get to the first process. * Set up an interrupt return frame and IRET to user level. */
1991/0711		TEXT touser(SB),$0
1991/0720		PUSHL $(UDSEL) /* old ss */
1992/0323		MOVL sp+0(FP),AX /* old sp */ PUSHL AX
1991/0720		PUSHFL /* old flags */ PUSHL $(UESEL) /* old cs */ PUSHL $(UTZERO+32) /* old pc */
1991/0719		MOVL $(UDSEL),AX
1991/0717		MOVW AX,DS
1991/0719		MOVW AX,ES
1991/1211		MOVW AX,GS MOVW AX,FS
1991/0716		IRETL
1991/0806		/* * set configuration register */ TEXT config(SB),$0 MOVL l+0(FP),AX MOVL $0x3F3,DX OUTB OUTB RET
1992/1107		/*
1992/1119		* copy bitmap changes to screen memory for ldepth 0 screen.
1992/1108		* reverse the bits since the screen is big-endian * and the bitmaps are little.
1992/1107		*/ TEXT l0update(SB),$0 MOVL len+8(FP),CX
1992/1119		SHRL $1,CX
1992/1118		MOVL from+4(FP),SI MOVL to+0(FP),DI
1992/1119		XORL AX,AX
1992/1107		l00:
1992/1119		MOVW -2(SI)(CX*2),DX MOVB DH,AL MOVB revtab0(SB)(AX*1),BX SHLL $8,BX MOVB DL,AL ORB revtab0(SB)(AX*1),BX MOVW BX,-2(DI)(CX*2)
1992/1107		LOOP l00
1992/1108		RET #define SRX 0x3C4 /* index to sequence registers */ #define SR 0x3C5 /* sequence registers */ #define Smmask 0x02 /* map mask */ /* * same as l0update but for ldepth 1 (2 bit plane) screens */ TEXT l1update(SB),$0
1992/1111		XORL AX,AX
1992/1118		MOVL from+4(FP),SI MOVL to+0(FP),DI
1992/1108		MOVL len+8(FP),CX
1992/1109		MOVB $(Smmask),AL
1992/1108		MOVW $(SRX),DX OUTB
1992/1109		l10:
1992/1111		MOVL -4(SI)(CX*2),DX MOVB DL,AL MOVL l1revsep(SB)(AX*4),BX SHLL $4,BX RORL $8,DX MOVB DL,AL ORL l1revsep(SB)(AX*4),BX RORL $12,BX RORL $8,DX MOVB DL,AL ORL l1revsep(SB)(AX*4),BX SHLL $4,BX RORL $8,DX MOVB DL,AL ORL l1revsep(SB)(AX*4),BX ROLL $8,BX MOVW $(SR),DX MOVB $0x5,AL /* write lo order bits to bit planes 1 & 3 */ OUTB MOVW BX,-2(DI)(CX*1)
1992/1112		SHRL $16,BX /* write hi order bits to bit planes 0 & 2 */
1992/1111		MOVB $0xA,AL OUTB MOVW BX,-2(DI)(CX*1)
1992/1121		LOOP l10
1992/1111		RET /* * same as l0update but for ldepth 2 (4 bit plane) screens */ TEXT l2update(SB),$0
1992/1109		XORL AX,AX
1992/1118		MOVL from+4(FP),SI MOVL to+0(FP),DI
1992/1111		MOVL len+8(FP),CX MOVB $(Smmask),AL MOVW $(SRX),DX
1992/1108		OUTB
1992/1111		l20: MOVL -4(SI)(CX*4),DX MOVB DL,AL MOVL l2revsep(SB)(AX*4),BX SHLL $2,BX SHRL $8,DX MOVB DL,AL ORL l2revsep(SB)(AX*4),BX SHLL $2,BX SHRL $8,DX MOVB DL,AL ORL l2revsep(SB)(AX*4),BX SHLL $2,BX SHRL $8,DX MOVB DL,AL ORL l2revsep(SB)(AX*4),BX MOVW $(SR),DX MOVB $0x1,AL /* plane 3 */
1992/1108		OUTB
1992/1111		MOVB BX,-1(DI)(CX*1) MOVB $0x2,AL /* plane 2 */ OUTB SHRL $8,BX MOVB BX,-1(DI)(CX*1) MOVB $0x4,AL /* plane 1 */ OUTB SHRL $8,BX MOVB BX,-1(DI)(CX*1) MOVB $0x8,AL /* plane 0*/ OUTB SHRL $8,BX MOVB BX,-1(DI)(CX*1) LOOP l20
1992/1107		RET
1993/0212		/* * The DP8390 ethernet chip needs some time between * successive chip selects, so we force a jump into * the instruction stream to break the pipeline. */ TEXT dp8390inb(SB), $0 MOVL p+0(FP),DX XORL AX,AX /* CF = 0 */ INB JCC _dp8390inb0 /* always true */ MOVL AX,AX _dp8390inb0: RET TEXT dp8390outb(SB), $0 MOVL p+0(FP),DX MOVL b+4(FP),AX OUTB CLC /* CF = 0 */ JCC _dp8390outb0 /* always true */ MOVL AX,AX _dp8390outb0: RET