1993/0905/carrera/devether.c (diff list | history)

1993/0904/sys/src/9/carrera/devether.c:17,22 – 1993/0905/sys/src/9/carrera/devether.c:17,23 (short | long | prev | next)
1993/0903
1993/0904		#define RD(rn) (delay(1), *(ulong*)((ulong)&SONICADDR->rn^4)) #define WR(rn, v) (delay(1), *(ulong*)((ulong)&SONICADDR->rn^4) = v)
1993/0905		#define ISquad(s) if((ulong)s & 0x7) panic("sonoc: Quad alignment");
1993/0903
1993/0904		typedef struct {
1993/0904/sys/src/9/carrera/devether.c:177,189 – 1993/0905/sys/src/9/carrera/devether.c:178,191
1993/0904		Interface = -1, /* descriptor belongs to interface */ Nether = 1, Ntypes= 8,
1993/0905		Ntypes = 8,
1993/0904		}; /* * CAM Descriptor */ typedef struct {
1993/0905		typedef struct {
1993/0904		uchar pad0[2]; ushort cep; /* CAM entry pointer */ uchar pad1[2];
1993/0904/sys/src/9/carrera/devether.c:234,240 – 1993/0905/sys/src/9/carrera/devether.c:236,241
1993/0903		{
1993/0904		int i;
1993/0903
1993/0904		iprint("reset sonic dcr=#%lux mydcr=#%lux\n", RD(dcr), Sterm|Dw32|Lbr|Efm|W14tf); /* * Reset the SONIC, toggle the Rst bit. * Set the data config register for synchronous termination
1993/0904/sys/src/9/carrera/devether.c:242,248 – 1993/0905/sys/src/9/carrera/devether.c:243,250
1993/0904		* Clear the descriptor and buffer area. */ WR(cr, Rst); WR(dcr, Sterm|Dw32|Lbr|Efm|W14tf);
1993/0905		WR(dcr, 0x2423); /* 5-19 Carrera manual */ iprint("eobc #%lux\n", RD(eobc));
1993/0904		WR(cr, 0);
1993/0903
1993/0904		/*
1993/0904/sys/src/9/carrera/devether.c:255,261 – 1993/0905/sys/src/9/carrera/devether.c:257,263
1993/0904		* thus the size of the receive buffers must be sizeof(Etherpkt)+4. * Set up the receive descriptors as a ring. */ for(i = 0; i < Nrb; i++){
1993/0905		for(i = 0; i < Nrb; i++) {
1993/0904		ctlr->rra[i].wc0 = (sizeof(ctlr->rb[0])/2) & 0xFFFF; ctlr->rra[i].wc1 = ((sizeof(ctlr->rb[0])/2)>>16) & 0xFFFF;
1993/0903
1993/0904/sys/src/9/carrera/devether.c:266,271 – 1993/0905/sys/src/9/carrera/devether.c:268,277
1993/0904		ctlr->rra[i].ptr1 = ctlr->rda[i].ptr1 = MS16(ctlr->rb[i]); }
1993/0903
1993/0905		ISquad(ctlr->rra); ISquad(ctlr->rda); ISquad(ctlr->rb);
1993/0904		/* * Terminate the receive descriptor ring * and load the SONIC registers to describe the RDA.
1993/0904/sys/src/9/carrera/devether.c:275,280 – 1993/0905/sys/src/9/carrera/devether.c:281,287
1993/0904		WR(crda, LS16(ctlr->rda)); WR(urda, MS16(ctlr->rda)); WR(eobc, sizeof(ctlr->rb[0])/2 - 2);
1993/0905		iprint("eobc #%lux\n", RD(eobc));
1993/0903
1993/0904		/* * Load the SONIC registers to describe the RRA.
1993/0904/sys/src/9/carrera/devether.c:291,301 – 1993/0905/sys/src/9/carrera/devether.c:298,306
1993/0904		WR(rea, LS16(&ctlr->rra[Nrb])); WR(rwp, LS16(&ctlr->rra[Nrb+1]));
1993/0903
1993/0904		iprint("wait rra\n"); WR(cr, Rrra); while(RD(cr) & Rrra) ; iprint("rra done\n"); /* * Initialise the transmit descriptor area (TDA).
1993/0904/sys/src/9/carrera/devether.c:358,367 – 1993/0905/sys/src/9/carrera/devether.c:363,390
1993/0904		WR(rcr, Err|Rnt|Brd); WR(tcr, 0); WR(imr, AllIntr); iprint("reset done\n");
1993/0903		} void
1993/0905		pxp(RXpkt *rxpkt) { print("%lux %lux\n", rxpkt->pad0[0], rxpkt->pad0[1]); print("status %lux\n", rxpkt->status); /* receive status */ print("%lux %lux\n", rxpkt->pad1[0], rxpkt->pad1[1]); print("count %lux\n", rxpkt->count); /* packet byte count */ print("%lux %lux\n", rxpkt->pad2[0], rxpkt->pad2[1]); print("ptr0 %lux\n", rxpkt->ptr0); /* buffer pointer */ print("%lux %lux\n", rxpkt->pad3[0], rxpkt->pad3[1]); print("ptr1 %lux\n", rxpkt->ptr1); print("%lux %lux\n", rxpkt->pad4[0], rxpkt->pad4[1]); print("seqno %lux\n", rxpkt->seqno); /* */ print("%lux %lux\n", rxpkt->pad5[0], rxpkt->pad5[1]); print("link %lux\n", rxpkt->link); /* descriptor link and EOL */ print("%lux %lux\n", rxpkt->pad6[0], rxpkt->pad6[1]); print("owner %lux\n", rxpkt->owner); /* in use */ } void
1993/0903		etherintr(void) { int x;
1993/0904/sys/src/9/carrera/devether.c:379,384 – 1993/0905/sys/src/9/carrera/devether.c:402,408
1993/0904		status = RD(isr) & AllIntr; if(status == 0) break;
1993/0905		print("s %lux\n", status);
1993/0904		WR(isr, status);
1993/0904/sys/src/9/carrera/devether.c:410,417 – 1993/0905/sys/src/9/carrera/devether.c:434,441
1993/0904		/* * A packet arrived or we ran out of descriptors. */ status &= ~(Pktrx|Rde); rxpkt = &ctlr->rda[ctlr->rh];
1993/0905		pxp(rxpkt);
1993/0904		while(rxpkt->owner == Host){ ctlr->inpackets++;
1993/0904/sys/src/9/carrera/devether.c:470,485 – 1993/0905/sys/src/9/carrera/devether.c:494,509
1993/0904		* Warnings that something is afoot. */ if(status & Hbl){ print("sonic: cd heartbeat lost\n");
1993/0905		iprint("sonic: cd heartbeat lost\n");
1993/0904		status &= ~Hbl;
1993/0903		}
1993/0904		if(status & Br){ print("sonic: bus retry occurred\n");
1993/0905		iprint("sonic: bus retry occurred\n");
1993/0904		status &= ~Br; } if(status & AllIntr) print("sonic %ux\n", status);
1993/0905		iprint("sonic #%lux\n", status);
1993/0903		} }
1993/0904/sys/src/9/carrera/devether.c:513,519 – 1993/0905/sys/src/9/carrera/devether.c:537,547
1993/0904		*/ if(ether[0] == 0) { ether[0] = xspanalloc(sizeof(Ether), BY2PG, 64*1024); /* memmove(ether[0]->ea, eeprom.ea, sizeof(ether[0]->ea)); */
1993/0905		if(PADDR(ether[0])+sizeof(Ether) > Ntranslation*BY2PG) panic("sonic: 16M io map"); enetaddr(ether[0]->ea);
1993/0903		}
1993/0904		ctlr = ether[0];
1993/0903
1993/0904/sys/src/9/carrera/devether.c:531,536 – 1993/0905/sys/src/9/carrera/devether.c:559,570
1993/0903		} void
1993/0905		enab(void) { WR(cr, Rxen); } void
1993/0903		etherinit(void) { }
1993/0904/sys/src/9/carrera/devether.c:538,543 – 1993/0905/sys/src/9/carrera/devether.c:572,584
1993/0903		Chan* etherattach(char *spec) {
1993/0905		static int enable; if(enable == 0) { enable = 1; WR(cr, Rxen); }
1993/0903		return devattach('l', spec); }
1993/0904/sys/src/9/carrera/devether.c:594,599 – 1993/0905/sys/src/9/carrera/devether.c:635,642
1993/0903		USED(offset);
1993/0905		iprint("ether tx\n");
1993/0903		if(n > ETHERMAXTU) error(Ebadarg);
1993/0904/sys/src/9/carrera/devether.c:604,612 – 1993/0905/sys/src/9/carrera/devether.c:647,655
1993/0903		/* we handle data */
1993/0904		qlock(&ctlr->tlock); tsleep(&ctlr->tr, isoutbuf, ctlr, 10000); if(!isoutbuf(ctlr)){
1993/0905		if(!isoutbuf(ctlr))
1993/0903		print("ether transmitter jammed\n");
1993/0904		} else { p =(Etherpkt*)ctlr->tb[ctlr->th];
1993/0903		memmove(p->d, buf, n);
1993/0904/sys/src/9/carrera/devether.c:627,632 – 1993/0905/sys/src/9/carrera/devether.c:670,678
1993/0904		WR(cr, Txp);
1993/0903		}
1993/0904		qunlock(&ctlr->tlock);
1993/0905		iprint("tx done %d\n", n);
1993/0903		return n; }