plan 9 kernel history: overview | file list | diff list

1994/0305/carrera/main.c (diff list | history)

1994/0225/sys/src/9/carrera/main.c:228,2381994/0305/sys/src/9/carrera/main.c:228,238 (short | long | prev | next)
Whitespace edit.
rsc Fri Mar 4 12:44:25 2005
1994/0225    
	 *  Set the 8259 as master with edge triggered 
	 *  input with fully nested interrupts. 
	 */ 
	EISAOUTB(Int0ctl, 0x11);		/* ICW1 - edge triggered, master, 
						   ICW4 will be sent */ 
	EISAOUTB(Int0aux, Int0vec);		/* ICW2 - interrupt vector offset */ 
	EISAOUTB(Int0aux, 0x04);		/* ICW3 - have slave on level 2 */ 
	EISAOUTB(Int0aux, 0x01);		/* ICW4 - 8086 mode, not buffered */ 
1994/0305    
	EISAOUTB(Int0ctl, 0x11);	/* ICW1 - edge triggered, master, 
					   ICW4 will be sent */ 
	EISAOUTB(Int0aux, Int0vec);	/* ICW2 - interrupt vector offset */ 
	EISAOUTB(Int0aux, 0x04);	/* ICW3 - have slave on level 2 */ 
	EISAOUTB(Int0aux, 0x01);	/* ICW4 - 8086 mode, not buffered */ 
1994/0225    
 
	/* 
	 *  Set up the second 8259 interrupt processor. 
1994/0225/sys/src/9/carrera/main.c:240,2501994/0305/sys/src/9/carrera/main.c:240,250
1994/0225    
	 *  Set the 8259 as master with edge triggered 
	 *  input with fully nested interrupts. 
	 */ 
	EISAOUTB(Int1ctl, 0x11);		/* ICW1 - edge triggered, master, 
						   ICW4 will be sent */ 
	EISAOUTB(Int1aux, Int1vec);		/* ICW2 - interrupt vector offset */ 
	EISAOUTB(Int1aux, 0x02);		/* ICW3 - I am a slave on level 2 */ 
	EISAOUTB(Int1aux, 0x01);		/* ICW4 - 8086 mode, not buffered */ 
1994/0305    
	EISAOUTB(Int1ctl, 0x11);	/* ICW1 - edge triggered, master, 
					   ICW4 will be sent */ 
	EISAOUTB(Int1aux, Int1vec);	/* ICW2 - interrupt vector offset */ 
	EISAOUTB(Int1aux, 0x02);	/* ICW3 - I am a slave on level 2 */ 
	EISAOUTB(Int1aux, 0x01);	/* ICW4 - 8086 mode, not buffered */ 
1994/0225    
 
	/* 
	 *  pass #2 8259 interrupts to #1 


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