| plan 9 kernel history: overview | file list | diff list |
1994/1206/pc/clock.c (diff list | history)
| pc/clock.c on 1991/0704 | ||
| 1991/0704 | #include "u.h" | |
| 1992/0321 | #include "../port/lib.h" | |
| 1991/0704 | #include "mem.h" #include "dat.h" #include "fns.h" #include "io.h" | |
| 1991/0706 | #include "ureg.h" | |
| 1991/0704 | ||
| 1991/0705 | /* * 8253 timer */ enum { | |
| 1991/0709 | T0cntr= 0x40, /* counter ports */ T1cntr= 0x41, /* ... */ T2cntr= 0x42, /* ... */ Tmode= 0x43, /* mode port */ | |
| 1991/0705 | ||
| 1992/0923 | /* commands */ Latch0= 0x00, /* latch counter 0's value */ Load0= 0x30, /* load counter 0 with 2 bytes */ /* modes */ Square= 0x36, /* perioic square wave */ | |
| 1994/0512 | Trigger= 0x30, /* interrupt on terminal count */ | |
| 1992/0923 | Freq= 1193182, /* Real clock frequency */ | |
| 1991/0705 | }; | |
| 1994/0809 | static int cpufreq = 66000000; static int cpumhz = 66; | |
| 1994/0716 | static int loopconst = 100; | |
| 1994/1031 | static int cpuidax, cpuiddx; | |
| 1992/0923 | ||
| 1993/1124 | static void clock(Ureg *ur, void *arg) { Proc *p; int nrun = 0; USED(arg); m->ticks++; checkalarms(); | |
| 1994/0128 | hardclock(); | |
| 1994/0715 | uartclock(); | |
| 1993/1124 | /* * process time accounting */ p = m->proc; if(p){ nrun = 1; p->pc = ur->pc; if (p->state==Running) p->time[p->insyscall]++; } nrun = (nrdy+nrun)*1000; MACHP(0)->load = (MACHP(0)->load*19+nrun)/20; | |
| 1994/0809 | if(up && up->state == Running){ | |
| 1994/0507 | if(anyready()) sched(); /* user profiling clock */ | |
| 1994/0810 | if((ur->cs&0xffff) == UESEL) | |
| 1994/0809 | (*(ulong*)(USTKTOP-BY2WD)) += TK2MS(1); | |
| 1994/0507 | } | |
| 1993/1124 | ||
| 1994/0525 | mouseclock(); | |
| 1993/1124 | } | |
| 1994/1031 | #define STEPPING(x) ((x)&0xf) #define MODEL(x) (((x)>>4)&0xf) #define FAMILY(x) (((x)>>8)&0xf) enum { /* flags */ CpuidFPU = 0x001, /* on-chip floating point unit */ CpuidMCE = 0x080, /* machine check exception */ CpuidCX8 = 0x100, /* CMPXCHG8B instruction */ }; typedef struct { int family; int model; int aalcycles; char *name; } X86type; X86type x86type[] = { /* from the cpuid instruction */ | |
| 1994/1120 | { 4, 0, 22, "Intel486DX", }, { 4, 1, 22, "Intel486DX", }, { 4, 2, 22, "Intel486SX", }, { 4, 3, 22, "Intel486DX2", }, { 4, 4, 22, "Intel486DX2", }, { 4, 5, 22, "Intel486SL", }, { 4, 8, 22, "IntelDX4", }, | |
| 1994/1031 | { 5, 1, 23, "Pentium510", }, { 5, 2, 23, "Pentium735", }, /* family defaults */ { 3, -1, 32, "Intel386", }, | |
| 1994/1120 | { 4, -1, 22, "Intel486", }, | |
| 1994/1031 | { 5, -1, 23, "Pentium", }, /* total default */ { -1, -1, 23, "unknown", }, }; static X86type *cputype; | |
| 1994/0302 | /* | |
| 1994/0716 | * delay for l milliseconds more or less. delayloop is set by * clockinit() to match the actual CPU speed. | |
| 1994/0302 | */ | |
| 1994/0716 | void delay(int l) | |
| 1994/0302 | { | |
| 1994/0716 | aamloop(l*loopconst); } | |
| 1994/0302 | void printcpufreq(void) { | |
| 1994/1101 | print("CPU is a %d MHz %s (cpuid: ax %lux dx %lux)\n", cpumhz, cputype->name, cpuidax, cpuiddx); | |
| 1994/0302 | } | |
| 1994/1031 | int x86(void) { return cputype->family; } | |
| 1991/0704 | void clockinit(void) { | |
| 1994/1031 | int x, y; /* change in counter */ | |
| 1994/1201 | int family, model, loops, incr; | |
| 1994/1031 | X86type *t; | |
| 1992/0922 | ||
| 1991/0709 | /* * set vector for clock interrupts */ | |
| 1993/1124 | setvec(Clockvec, clock, 0); | |
| 1991/0709 | /* | |
| 1994/1031 | * figure out what we are */ x86cpuid(&cpuidax, &cpuiddx); family = FAMILY(cpuidax); model = MODEL(cpuidax); for(t = x86type; t->name; t++) if((t->family == family && t->model == model) || (t->family == family && t->model == -1) || (t->family == -1)) break; cputype = t; /* | |
| 1994/0512 | * set clock for 1/HZ seconds | |
| 1991/0709 | */ | |
| 1994/0603 | outb(Tmode, Load0|Square); | |
| 1991/0709 | outb(T0cntr, (Freq/HZ)); /* low byte */ outb(T0cntr, (Freq/HZ)>>8); /* high byte */ | |
| 1992/0922 | ||
| 1994/1201 | /* find biggest loop that doesn't wrap */ incr = 16000000/(t->aalcycles*HZ*2); | |
| 1994/1206 | x = 2000; | |
| 1994/1201 | for(loops = incr; loops < 64*1024; loops += incr) { /* * measure time for the loop * * MOVL loops,CX * aaml1: AAM * LOOP aaml1 * * the time for the loop should be independent of external * cache and memory system since it fits in the execution * prefetch buffer. * */ outb(Tmode, Latch0); x = inb(T0cntr); x |= inb(T0cntr)<<8; aamloop(loops); outb(Tmode, Latch0); y = inb(T0cntr); y |= inb(T0cntr)<<8; x -= y; if(x < 0) x += Freq/HZ; | |
| 1994/0809 | ||
| 1994/1201 | if(x > Freq/(3*HZ)) break; } | |
| 1992/0923 | ||
| 1994/1101 | /* * counter goes at twice the frequency, once per transition, * i.e., twice per square wave */ x >>= 1; /* * figure out clock frequency and a loop multiplier for delay(). */ cpufreq = loops*((t->aalcycles*Freq)/x); loopconst = (cpufreq/1000)/t->aalcycles; /* AAM+LOOP's for 1 ms */ | |
| 1994/0719 | ||
| 1994/0809 | /* | |
| 1994/1201 | * add in possible .2% error and convert to MHz | |
| 1994/0809 | */ | |
| 1994/1201 | cpumhz = (cpufreq + cpufreq/500)/1000000; | |
| 1991/0808 | } | |