1998/1022/pc/i8259.c (diff list | history)

1998/0910/sys/src/9/pc/i8259.c:27,39 – 1998/1022/sys/src/9/pc/i8259.c:27,39 (short | long | prev | next)
hw BUG fix? better test for edge/level register. publish elcr rsc Fri Mar 4 12:44:25 2005
1997/0327		static int int0mask; /* interrupts enabled for first 8259 */ static int int1mask; /* interrupts enabled for second 8259 */
1998/0910		static int elcr; /* mask of level-triggered interrupts */
1998/1022		int elcr; /* mask of level-triggered interrupts */
1998/0910		static Lock i8259lock;
1997/0327		void i8259init(void) { int elcr1;
1998/1022		int x;
1997/0327
1998/0910		ilock(&i8259lock);
1997/0327		int0mask = 0xFF;
1998/0910/sys/src/9/pc/i8259.c:83,100 – 1998/1022/sys/src/9/pc/i8259.c:83,104
1997/0327		/* * Check for Edge/Level register. * This check may not work for all chipsets.
1998/1022		* First try a non-intrusive test - the bits for * IRQs 13, 8, 2, 1 and 0 must be edge (0). If * that's OK try a R/W test.
1997/0327		*/ elcr1 = inb(Elcr1); outb(Elcr1, 0); if(inb(Elcr1) == 0){ outb(Elcr1, 0x20); if(inb(Elcr1) == 0x20) elcr = (inb(Elcr2)<<8)|elcr1;
1998/1022		x = (inb(Elcr2)<<8)|inb(Elcr1); if(!(x & 0x2107)){ outb(Elcr1, 0); if(inb(Elcr1) == 0){ outb(Elcr1, 0x20); if(inb(Elcr1) == 0x20) elcr = x; outb(Elcr1, x & 0xFF); //print("ELCR: %4.4uX\n", elcr); }
1997/0327		} outb(Elcr1, elcr1);
1998/0910		iunlock(&i8259lock);
1997/0521		// if(elcr) // print("ELCR: %4.4uX\n", elcr);
1997/0327		} int