2000/0604/pc/ether8390.c (diff list | history)

1998/0825/sys/src/9/pc/ether8390.c:535,541 – 2000/0604/sys/src/9/pc/ether8390.c:535,541 (short | long | prev | next)
1997/0327		regw(ctlr, Cr, Page0|RdABORT|Sta);
1993/1118		receive(ether);
1997/0327		regw(ctlr, Isr, Ovw); regw(ctlr, Tcr, 0);
2000/0604		regw(ctlr, Tcr, LpbkNORMAL);
1993/0212		if(resend)
1997/0327		regw(ctlr, Cr, Page0|RdABORT|Txp|Sta);
1998/0825/sys/src/9/pc/ether8390.c:555,561 – 2000/0604/sys/src/9/pc/ether8390.c:555,561
1992/1222		* While there is something of interest, * clear all the interrupts and process. */
1997/0327		lock(ctlr);
2000/0604		ilock(ctlr);
1997/0327		regw(ctlr, Imr, 0x00); while(isr = (regr(ctlr, Isr) & (Cnt|Ovw|Txe|Rxe|Ptx|Prx))){
1992/1222		if(isr & Ovw){
1998/0825/sys/src/9/pc/ether8390.c:601,607 – 2000/0604/sys/src/9/pc/ether8390.c:601,607
1993/0212		}
1992/1222		}
1997/0327		regw(ctlr, Imr, Cnt|Ovw|Txe|Rxe|Ptx|Prx); unlock(ctlr);
2000/0604		iunlock(ctlr);
1993/1116		}
1997/0418		static uchar allmar[8] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
1998/0825/sys/src/9/pc/ether8390.c:705,710 – 2000/0604/sys/src/9/pc/ether8390.c:705,714
1993/1116		* The init routine leaves the chip in monitor * mode. Clear the missed-packet counter, it * increments while in monitor mode.
2000/0604		* Sometimes there's an interrupt pending at this * point but there's nothing in the Isr, so * any pending interrupts are cleared and the * mask of acceptable interrupts is enabled here.
1993/1116		*/
1997/0327		r = Ab;
1995/0801		if(ether->prom)
1998/0825/sys/src/9/pc/ether8390.c:712,719 – 2000/0604/sys/src/9/pc/ether8390.c:716,726
1997/0415		if(ether->nmaddr) r |= Am;
1997/0327		ilock(ctlr);
2000/0604		regw(ctlr, Isr, 0xFF); regw(ctlr, Imr, Cnt|Ovw|Txe|Rxe|Ptx|Prx);
1997/0327		regw(ctlr, Rcr, r); r = regr(ctlr, Cntr2);
2000/0604		regw(ctlr, Tcr, LpbkNORMAL);
1997/0327		iunlock(ctlr); USED(r);
1993/1116		}
1998/0825/sys/src/9/pc/ether8390.c:759,765 – 2000/0604/sys/src/9/pc/ether8390.c:766,772
1997/0327		regw(ctlr, Rbcr0, 0); regw(ctlr, Rbcr1, 0);
1993/1116
1997/0327		regw(ctlr, Tcr, 0);
2000/0604		regw(ctlr, Tcr, LpbkNIC);
1997/0327		regw(ctlr, Rcr, Mon);
1993/1116		/*
1998/0825/sys/src/9/pc/ether8390.c:770,777 – 2000/0604/sys/src/9/pc/ether8390.c:777,787
1997/0327		ringinit(ctlr); regw(ctlr, Tpsr, ctlr->tstart);
1993/1116
2000/0604		/* * Clear any pending interrupts and mask then all off. */
1997/0327		regw(ctlr, Isr, 0xFF); regw(ctlr, Imr, Cnt|Ovw|Txe|Rxe|Ptx|Prx);
2000/0604		regw(ctlr, Imr, 0);
1993/1116		/* * Leave the chip initialised,