2000/1019/bitsy/sa1110uart.c (diff list | history)

2000/1018/sys/src/9/bitsy/sa1110uart.c:63,68 – 2000/1019/sys/src/9/bitsy/sa1110uart.c:63,69 (short | long | prev | next)
2000/1018		}; Uartregs *uart3regs = UART3REGS;
2000/1019		Uartregs *uart1regs = UART1REGS ;
2000/1018		static void sa1100_uartbaud(Uart *p, int rate); static void sa1100_uartkick(Uart *p);
2000/1018/sys/src/9/bitsy/sa1110uart.c:160,173 – 2000/1019/sys/src/9/bitsy/sa1110uart.c:161,181
2000/1018		sa1100_uartbaud(Uart *p, int rate) { ulong brconst;
2000/1019		ulong ctl3;
2000/1018		if(rate <= 0) return;
2000/1019		/* disable */ ctl3 = R(p)->ctl[3]; R(p)->ctl[3] = 0;
2000/1018		brconst = p->freq/(16*rate) - 1; R(p)->ctl[1] = (brconst>>8) & 0xf; R(p)->ctl[2] = brconst;
2000/1019		R(p)->ctl[2] = brconst & 0xff;
2000/1018
2000/1019		/* reenable */ R(p)->ctl[3] = ctl3;
2000/1018		p->baud = rate; }
2000/1018/sys/src/9/bitsy/sa1110uart.c:191,196 – 2000/1019/sys/src/9/bitsy/sa1110uart.c:199,210
2000/1018		static void sa1100_uartbits(Uart *p, int n) {
2000/1019		ulong ctl3; /* disable */ ctl3 = R(p)->ctl[3]; R(p)->ctl[3] = 0;
2000/1018		switch(n){ case 7: R(p)->ctl[0] &= ~Bits8;
2000/1018/sys/src/9/bitsy/sa1110uart.c:201,206 – 2000/1019/sys/src/9/bitsy/sa1110uart.c:215,223
2000/1018		default: error(Ebadarg); }
2000/1019		/* reenable */ R(p)->ctl[3] = ctl3;
2000/1018		} /*
2000/1018/sys/src/9/bitsy/sa1110uart.c:209,214 – 2000/1019/sys/src/9/bitsy/sa1110uart.c:226,237
2000/1018		static void sa1100_uartstop(Uart *p, int n) {
2000/1019		ulong ctl3; /* disable */ ctl3 = R(p)->ctl[3]; R(p)->ctl[3] = 0;
2000/1018		switch(n){ case 1: R(p)->ctl[0] &= ~Stop2;
2000/1018/sys/src/9/bitsy/sa1110uart.c:219,224 – 2000/1019/sys/src/9/bitsy/sa1110uart.c:242,250
2000/1018		default: error(Ebadarg); }
2000/1019		/* reenable */ R(p)->ctl[3] = ctl3;
2000/1018		} /*
2000/1018/sys/src/9/bitsy/sa1110uart.c:255,260 – 2000/1019/sys/src/9/bitsy/sa1110uart.c:281,292
2000/1018		static void sa1100_uartparity(Uart *p, int type) {
2000/1019		ulong ctl3; /* disable */ ctl3 = R(p)->ctl[3]; R(p)->ctl[3] = 0;
2000/1018		switch(type){ case 'e': R(p)->ctl[0] |= Parity|Even;
2000/1018/sys/src/9/bitsy/sa1110uart.c:266,271 – 2000/1019/sys/src/9/bitsy/sa1110uart.c:298,306
2000/1018		R(p)->ctl[0] &= ~(Parity|Even); break; }
2000/1019		/* reenable */ R(p)->ctl[3] = ctl3;
2000/1018		} /*
2000/1018/sys/src/9/bitsy/sa1110uart.c:330,335 – 2000/1019/sys/src/9/bitsy/sa1110uart.c:365,374
2000/1018		p = x; regs = p->regs;
2000/1019		/* receiver interrupt, snarf bytes */ while(regs->status[1] & Rnotempty) uartrecv(p, regs->data);
2000/1018		/* remember and reset interrupt causes */ s = regs->status[0]; regs->status[0] |= s;
2000/1018/sys/src/9/bitsy/sa1110uart.c:339,348 – 2000/1019/sys/src/9/bitsy/sa1110uart.c:378,383
2000/1018		uartkick(p); } /* receiver interrupt, snarf bytes */ while(regs->status[1] & Rnotempty) uartrecv(p, regs->data);                  if(s & (ParityError|FrameError|Overrun)){ if(s & ParityError) p->parity++;
2000/1018/sys/src/9/bitsy/sa1110uart.c:351,356 – 2000/1019/sys/src/9/bitsy/sa1110uart.c:386,395
2000/1018		if(s & Overrun) p->overrun++; }
2000/1019		/* receiver interrupt, snarf bytes */ while(regs->status[1] & Rnotempty) uartrecv(p, regs->data);
2000/1018		} typedef struct Gpclkregs Gpclkregs;
2000/1018/sys/src/9/bitsy/sa1110uart.c:379,385 – 2000/1019/sys/src/9/bitsy/sa1110uart.c:418,423
2000/1018		sa1100_uartsetup(int console) { Uart *p; Uartregs *uartregs; /* external serial port (eia0) */ uart3regs = mapspecial(UART3REGS, 64);
2000/1018/sys/src/9/bitsy/sa1110uart.c:393,400 – 2000/1019/sys/src/9/bitsy/sa1110uart.c:431,438
2000/1018		/* port for talking to microcontroller (eia1) */ gpclkregs = mapspecial(GPCLKREGS, 64); gpclkregs->r0 = Gpclk_sus; /* set uart mode */ uartregs = mapspecial(UART1REGS, 64); p = uartsetup(&sa1100_uart, uartregs, ClockFreq, "serialport1");
2000/1019		uart1regs = mapspecial(UART1REGS, 64); p = uartsetup(&sa1100_uart, uart1regs, ClockFreq, "serialport1");
2000/1018		sa1100_uartbaud(p, 115200); intrenable(IRQuart1b, sa1100_uartintr, p, p->name); }