plan 9 kernel history: overview | file list | diff list

2001/1023/alphapc/clock.c (diff list | history)

2001/1023/sys/src/9/alphapc/clock.c:1,1042002/0410/sys/src/9/alphapc/clock.c:1,109 (short | long | prev | next)
1999/0415    
#include	"u.h" 
#include	"../port/lib.h" 
#include	"mem.h" 
#include	"dat.h" 
#include	"fns.h" 
#include	"io.h" 
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#include	"axp.h" 
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#include	"ureg.h" 
 
void 
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clockinit(void) 
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{ 
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} 
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uvlong 
cycletimer(void) 
{ 
	ulong pcc; 
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	vlong delta; 
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	pcc = rpcc(nil) & 0xFFFFFFFF; 
	if(m->cpuhz == 0){ 
		/* 
		 * pcclast is needed to detect wraparound of 
		 * the cycle timer which is only 32-bits. 
		 * m->cpuhz is set from the info passed from 
		 * the firmware. 
		 * This could be in clockinit if can 
		 * guarantee no wraparound between then and now. 
		 * 
		 * All the clock stuff needs work. 
		 */ 
		m->cpuhz = hwrpb->cfreq; 
		m->pcclast = pcc; 
	} 
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	delta = pcc - m->pcclast; 
	if(delta < 0) 
		delta += 0x100000000LL; 
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	m->pcclast = pcc; 
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	m->fastclock += delta; 
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	return MACHP(0)->fastclock; 
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} 
 
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vlong 
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uvlong 
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fastticks(uvlong* hz) 
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{ 
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	uvlong ticks; 
	int x; 
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	x = splhi(); 
	ticks = cycletimer(); 
	splx(x); 
 
	if(hz) 
		*hz = m->cpuhz; 
 
	return (vlong)ticks; 
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	return ticks; 
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} 
 
void 
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timerset(uvlong) 
{ 
} 
 
void 
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microdelay(int us) 
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{ 
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	uvlong eot; 
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	eot = fastticks(nil) + (m->cpuhz/1000000)*us; 
	while(fastticks(nil) < eot) 
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		; 
} 
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void 
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delay(int millisecs) 
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{ 
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	microdelay(millisecs*1000); 
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} 
 
void 
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clock(Ureg *ureg) 
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{ 
	static int count; 
 
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	cycletimer(); 
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	/* HZ == 100, timer == 1024Hz.  error < 1ms */ 
	count += 100; 
	if (count < 1024) 
		return; 
	count -= 1024; 
 
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	portclock(ureg); 
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	timerintr(ureg, 0); 
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} 
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ulong 
TK2MS(ulong ticks) 
{ 
	uvlong t, hz; 
 
	t = ticks; 
	hz = HZ; 
	t *= 1000L; 
	t = t/hz; 
	ticks = t; 
	return ticks; 
} 


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