plan 9 kernel history: overview | file list | diff list

1992/0520/power/io.h (diff list | history)

1990/0227/sys/src/9/power/io.h:78,94 – 1990/03021/sys/src/9/power/io.h:78,80 (short | long)
1990/0227    
#define	MPBERR0		IO2(ulong, 0xF48000) 
#define	MPBERR1		IO2(ulong, 0xF4C000) 
#define SBEADDR		((ulong *)(UNCACHED|0x1f080000)) 
                 
/* 
 *  hsvme datakit board 
 */ 
struct hsvme { 
	ushort	version; 
	ushort	pad0x02; 
	ushort	vector; 
	ushort	pad0x06; 
	ushort	csr; 
	ushort	pad0x0A; 
	ushort	data; 
}; 
#define HSVME		VMEA24SUP(struct hsvme, 0xF90000)
1990/03021/sys/src/9/power/io.h:77,80 – 1990/0718/sys/src/9/power/io.h:77,80 (short | long)
1990/0227    
#define IO2MASK		IO2(ushort, 0xFE8000) 
#define	MPBERR0		IO2(ulong, 0xF48000) 
#define	MPBERR1		IO2(ulong, 0xF4C000) 
#define SBEADDR		((ulong *)(UNCACHED|0x1f080000))
1990/0718    
#define SBEADDR		((ulong *)(UNCACHED|0x1F080000))
1990/0718/sys/src/9/power/io.h:47,52 – 1990/0825/sys/src/9/power/io.h:47,56 (short | long)
1990/0227    
#define LANCERDP	IO2(ushort, 0xFC0002) 
#define LANCERAP	IO2(ushort, 0xFC000a) 
#define LANCEID		IO2(ushort, 0xFF0002)
1990/0825    
#define IOID		IO2(uchar, 0xFFFFF0) 
#define IO2R1		1	/* IO2 revision level 1 */ 
#define IO2R2		2	/* IO2 revision level 2 */ 
#define IO3R1		3	/* IO3 revision level 1 */
1990/0227    
 
typedef struct MODE	MODE; 
typedef struct INTVEC	INTVEC;
1990/0718/sys/src/9/power/io.h:78,80 – 1990/0825/sys/src/9/power/io.h:82,85
1990/0227    
#define	MPBERR0		IO2(ulong, 0xF48000) 
#define	MPBERR1		IO2(ulong, 0xF4C000)
1990/0718    
#define SBEADDR		((ulong *)(UNCACHED|0x1F080000))
1990/0825    
1990/0825/sys/src/9/power/io.h:83,85 – 1990/0826/sys/src/9/power/io.h:83,89 (short | long)
1990/0227    
#define	MPBERR1		IO2(ulong, 0xF4C000)
1990/0718    
#define SBEADDR		((ulong *)(UNCACHED|0x1F080000))
1990/0825    
1990/0826    
/* 
 *  IO board type 
 */ 
extern int ioid;
1990/0826/sys/src/9/power/io.h:87,89 – 1990/08272/sys/src/9/power/io.h:87,103 (short | long)
1990/0826    
 *  IO board type 
 */ 
extern int ioid;
1990/08272    
 
/* 
 *  The IO2/IO3 slave maps.  These maps are used to map 
 *  external addresses to MP bus addresses. 
 */ 
enum { 
	a24map,		/* VME A24 non-priv address space */ 
	a32map,		/* VME A32 non-priv address space */ 
	lancemap,	/* Lance chip address space */ 
	scsi1map,	/* SCSI bus 1 address space */ 
	scsi0map,	/* SCSI bus 0 address space */ 
	nomap, 
}; 
#define	WRITEMAP	IO2(ulong, 0xFA0000);
1990/08272/sys/src/9/power/io.h:44,52 – 1990/0905/sys/src/9/power/io.h:44,55 (short | long)
1990/0227    
 
#define LANCERAM	IO2(uchar, 0xE00000) 
#define LANCEEND	IO2(uchar, 0xF00000)
1990/0905    
#define LANCE3RAM	IO2(uchar, 0xFF4000) 
#define LANCE3END	IO2(uchar, 0xFF8000)
1990/0227    
#define LANCERDP	IO2(ushort, 0xFC0002) 
#define LANCERAP	IO2(ushort, 0xFC000a) 
#define LANCEID		IO2(ushort, 0xFF0002)
1990/0905    
1990/0825    
#define IOID		IO2(uchar, 0xFFFFF0) 
#define IO2R1		1	/* IO2 revision level 1 */ 
#define IO2R2		2	/* IO2 revision level 2 */
1990/08272/sys/src/9/power/io.h:83,92 – 1990/0905/sys/src/9/power/io.h:86,94
1990/0227    
#define	MPBERR1		IO2(ulong, 0xF4C000)
1990/0718    
#define SBEADDR		((ulong *)(UNCACHED|0x1F080000))
1990/0825    
1990/0826    
/* 
 *  IO board type 
 */ 
extern int ioid;
1990/0905    
extern int ioid;	/* io board type */ 
extern int iolevels;	/* number of io levels */ 
extern int iomask;	/* interrupts to enable */
1990/08272    
 
/* 
 *  The IO2/IO3 slave maps.  These maps are used to map
1990/08272/sys/src/9/power/io.h:93,103 – 1990/0905/sys/src/9/power/io.h:95,105
1990/08272    
 *  external addresses to MP bus addresses. 
 */ 
enum { 
	a24map,		/* VME A24 non-priv address space */ 
	a32map,		/* VME A32 non-priv address space */ 
	lancemap,	/* Lance chip address space */ 
	scsi1map,	/* SCSI bus 1 address space */ 
	scsi0map,	/* SCSI bus 0 address space */ 
	nomap,
1990/0905    
	A24map,		/* VME A24 non-priv address space */ 
	A32map,		/* VME A32 non-priv address space */ 
	Lancemap,	/* Lance chip address space */ 
	Scsi1map,	/* SCSI bus 1 address space */ 
	Scsi0map,	/* SCSI bus 0 address space */ 
	Nomap,
1990/08272    
}; 
#define	WRITEMAP	IO2(ulong, 0xFA0000);
1990/0905/sys/src/9/power/io.h:102,105 – 1990/09051/sys/src/9/power/io.h:102,105 (short | long)
1990/0905    
	Scsi0map,	/* SCSI bus 0 address space */ 
	Nomap,
1990/08272    
}; 
#define	WRITEMAP	IO2(ulong, 0xFA0000);
1990/09051    
#define	WRITEMAP	IO2(ulong, 0xFA0000)
1990/09051/sys/src/9/power/io.h:44,51 – 1990/0907/sys/src/9/power/io.h:44,51 (short | long)
1990/0227    
 
#define LANCERAM	IO2(uchar, 0xE00000) 
#define LANCEEND	IO2(uchar, 0xF00000)
1990/0905    
#define LANCE3RAM	IO2(uchar, 0xFF4000) 
#define LANCE3END	IO2(uchar, 0xFF8000)
1990/0907    
#define LANCE3RAM	IO2(ushort, 0xFF4000) 
#define LANCE3END	IO2(ushort, 0xFF8000)
1990/0227    
#define LANCERDP	IO2(ushort, 0xFC0002) 
#define LANCERAP	IO2(ushort, 0xFC000a) 
#define LANCEID		IO2(ushort, 0xFF0002)
1990/0907/sys/src/9/power/io.h:42,59 – 1990/0911/sys/src/9/power/io.h:42,61 (short | long)
1990/0227    
 
#define	DUARTREG	SYNCBUS(Duart, 0x1A00000) 
 
#define LANCERAM	IO2(uchar, 0xE00000) 
#define LANCEEND	IO2(uchar, 0xF00000)
1990/0911    
#define LANCERAM	IO2(ushort, 0xE00000) 
#define LANCEEND	IO2(ushort, 0xF00000)
1990/0907    
#define LANCE3RAM	IO2(ushort, 0xFF4000) 
#define LANCE3END	IO2(ushort, 0xFF8000)
1990/0227    
#define LANCERDP	IO2(ushort, 0xFC0002) 
#define LANCERAP	IO2(ushort, 0xFC000a) 
#define LANCEID		IO2(ushort, 0xFF0002)
1990/0911    
#define	WRITEMAP	IO2(ulong, 0xFA0000)
1990/0905    
1990/0825    
#define IOID		IO2(uchar, 0xFFFFF0) 
#define IO2R1		1	/* IO2 revision level 1 */ 
#define IO2R2		2	/* IO2 revision level 2 */ 
#define IO3R1		3	/* IO3 revision level 1 */
1990/0911    
extern int ioid;	/* io board type */
1990/0227    
 
typedef struct MODE	MODE; 
typedef struct INTVEC	INTVEC;
1990/0907/sys/src/9/power/io.h:85,105 – 1990/0911/sys/src/9/power/io.h:87,89
1990/0227    
#define	MPBERR0		IO2(ulong, 0xF48000) 
#define	MPBERR1		IO2(ulong, 0xF4C000)
1990/0718    
#define SBEADDR		((ulong *)(UNCACHED|0x1F080000))
1990/0825    
                 
1990/0905    
extern int ioid;	/* io board type */ 
extern int iolevels;	/* number of io levels */ 
extern int iomask;	/* interrupts to enable */
1990/08272    
                 
/* 
 *  The IO2/IO3 slave maps.  These maps are used to map 
 *  external addresses to MP bus addresses. 
 */ 
enum {
1990/0905    
	A24map,		/* VME A24 non-priv address space */ 
	A32map,		/* VME A32 non-priv address space */ 
	Lancemap,	/* Lance chip address space */ 
	Scsi1map,	/* SCSI bus 1 address space */ 
	Scsi0map,	/* SCSI bus 0 address space */ 
	Nomap,
1990/08272    
};
1990/09051    
#define	WRITEMAP	IO2(ulong, 0xFA0000)
1990/0911/sys/src/9/power/io.h:1,6 – 1990/1013/sys/src/9/power/io.h:1,7 (short | long)
1990/0227    
#define UNCACHED	0xA0000000 
#define	IO2(t,x)	((t *)(UNCACHED|0x17000000|(x))) 
#define VMEA24SUP(t, x)	((t *)(UNCACHED|0x13000000|(x)))
1990/1013    
#define VMEA32SUP(t, x)	((t *)(UNCACHED|0x30000000|(x)))
1990/0227    
#define	SYNCBUS(t,x)	((t *)(UNCACHED|0x1E000000|(x))) 
#define	SBSEM		SYNCBUS(ulong, 0) 
#define	SBSEMTOP	SYNCBUS(ulong, 0x400000)
1990/1013/sys/src/9/power/io.h:81,86 – 1990/1204/sys/src/9/power/io.h:81,87 (short | long)
1990/0227    
}; 
 
#define INTVECREG	IO2(INTVEC, 0xF60000)
1990/1204    
#define	NVRAM		IO2(uchar, 0xF10000)
1990/0227    
#define INTPENDREG	IO2(uchar, 0xF20000)	/* same as LED */ 
#define IO2CLRMASK	IO2(uchar, 0xFE0000) 
#define IO2SETMASK	IO2(uchar, 0xFE8000)
1990/1013/sys/src/9/power/io.h:87,90 – 1990/1204/sys/src/9/power/io.h:88,93
1990/0227    
#define IO2MASK		IO2(ushort, 0xFE8000) 
#define	MPBERR0		IO2(ulong, 0xF48000) 
#define	MPBERR1		IO2(ulong, 0xF4C000)
1990/1204    
#define	RTC		(NVRAM+0x3ff8)
1990/0718    
#define SBEADDR		((ulong *)(UNCACHED|0x1F080000))
1990/1204/sys/src/9/power/io.h:51,56 – 1990/1231/sys/src/9/power/io.h:51,57 (short | long)
1990/0227    
#define LANCERAP	IO2(ushort, 0xFC000a) 
#define LANCEID		IO2(ushort, 0xFF0002)
1990/0911    
#define	WRITEMAP	IO2(ulong, 0xFA0000)
1990/1231    
#define LANCEINDEX	0x1E00			/* index of lancemap */
1990/0905    
1990/0825    
#define IOID		IO2(uchar, 0xFFFFF0) 
#define IO2R1		1	/* IO2 revision level 1 */
1990/1231/sys/src/9/power/io.h:71,79 – 1991/0212/sys/src/9/power/io.h:71,86 (short | long)
1990/0227    
 
#define MODEREG		IO2(MODE, 0xF40000)
1991/0212    
/* 
 * VME addressing. 
 * MP2VME takes a physical MP bus address and returns an address 
 * usable by a VME device through A32 space 
 */
1990/0227    
#define	MASTER	0x0 
#define	SLAVE	0x4
1991/0212    
#define	MP2VME(addr)	(((ulong)(addr) & 0x0fffffff) | (SLAVE<<28))
1990/0227    
1991/0212    
1990/0227    
struct INTVEC { 
	struct { 
		ulong	vec;
1990/1231/sys/src/9/power/io.h:84,92 – 1991/0212/sys/src/9/power/io.h:91,99
1990/0227    
#define INTVECREG	IO2(INTVEC, 0xF60000)
1990/1204    
#define	NVRAM		IO2(uchar, 0xF10000)
1990/0227    
#define INTPENDREG	IO2(uchar, 0xF20000)	/* same as LED */ 
#define IO2CLRMASK	IO2(uchar, 0xFE0000) 
#define IO2SETMASK	IO2(uchar, 0xFE8000) 
#define IO2MASK		IO2(ushort, 0xFE8000)
1991/0212    
#define INTPENDREG3	IO2(uchar, 0xFF0000)	/* same as ENET ID */ 
#define IO2CLRMASK	IO2(ulong, 0xFE0000) 
#define IO2SETMASK	IO2(ulong, 0xFE8000)
1990/0227    
#define	MPBERR0		IO2(ulong, 0xF48000) 
#define	MPBERR1		IO2(ulong, 0xF4C000)
1990/1204    
#define	RTC		(NVRAM+0x3ff8)
1991/0212/sys/src/9/power/io.h:74,84 – 1991/0306/sys/src/9/power/io.h:74,85 (short | long)
1991/0212    
/* 
 * VME addressing. 
 * MP2VME takes a physical MP bus address and returns an address 
 * usable by a VME device through A32 space
1991/0306    
 * usable by a VME device through A32 space.  VME2MP is its inverse
1991/0212    
 */
1990/0227    
#define	MASTER	0x0 
#define	SLAVE	0x4
1991/0212    
#define	MP2VME(addr)	(((ulong)(addr) & 0x0fffffff) | (SLAVE<<28))
1991/0306    
#define	VME2MP(addr)	(((ulong)(addr) & 0x0fffffff) | KZERO)
1990/0227    
1991/0212    
1990/0227    
struct INTVEC {
1991/0306/sys/src/9/power/io.h:76,82 – 1992/0228/sys/src/9/power/io.h:76,82 (short | long)
1991/0212    
 * MP2VME takes a physical MP bus address and returns an address
1991/0306    
 * usable by a VME device through A32 space.  VME2MP is its inverse
1991/0212    
 */
1990/0227    
#define	MASTER	0x0
1992/0228    
#define	MASTER	0x1	/* 0x10000000 - Map for cyclone A32 addressing */
1990/0227    
#define	SLAVE	0x4
1991/0212    
#define	MP2VME(addr)	(((ulong)(addr) & 0x0fffffff) | (SLAVE<<28))
1991/0306    
#define	VME2MP(addr)	(((ulong)(addr) & 0x0fffffff) | KZERO)
1992/0228/sys/src/9/power/io.h:7,12 – 1992/0508/sys/src/9/power/io.h:7,20 (short | long)
1990/0227    
#define	SBSEMTOP	SYNCBUS(ulong, 0x400000) 
 
#define	LED		((char*)0xBF200001)
1992/0508    
enum 
{ 
	LEDhotintr=	1<<0, 
	LEDclock=	1<<1, 
	LEDfault=	1<<2, 
}; 
#define LEDON(x) { m->ledval |= x; *LED = m->ledval; } 
#define LEDOFF(x) { m->ledval &= ~x; *LED = m->ledval; }
1990/0227    
 
typedef struct SBCC	SBCC; 
typedef struct Timer	Timer;
1992/0508/sys/src/9/power/io.h:12,20 – 1992/0509/sys/src/9/power/io.h:12,21 (short | long)
1992/0508    
	LEDhotintr=	1<<0, 
	LEDclock=	1<<1, 
	LEDfault=	1<<2,
1992/0509    
	LEDpulse=	1<<7,
1992/0508    
}; 
#define LEDON(x) { m->ledval |= x; *LED = m->ledval; } 
#define LEDOFF(x) { m->ledval &= ~x; *LED = m->ledval; }
1992/0509    
#define LEDON(x) 	(m->ledval &= ~x, *LED = m->ledval) 
#define LEDOFF(x) 	(m->ledval |= x, *LED = m->ledval)
1990/0227    
 
typedef struct SBCC	SBCC; 
typedef struct Timer	Timer;
1992/0509/sys/src/9/power/io.h:19,25 – 1992/0520/sys/src/9/power/io.h:19,25 (short | long)
1990/0227    
 
typedef struct SBCC	SBCC; 
typedef struct Timer	Timer; 
typedef struct Duart	Duart;
1992/0520    
typedef struct Duartreg	Duartreg;
1990/0227    
 
struct SBCC 
{
1992/0509/sys/src/9/power/io.h:50,56 – 1992/0520/sys/src/9/power/io.h:50,56
1990/0227    
#define	CLRTIM0		SYNCBUS(uchar, 0x1100000) 
#define	CLRTIM1		SYNCBUS(uchar, 0x1180000) 
 
#define	DUARTREG	SYNCBUS(Duart, 0x1A00000)
1992/0520    
#define	DUARTREG	SYNCBUS(Duartreg, 0x1A00000)
1990/0227    
1990/0911    
#define LANCERAM	IO2(ushort, 0xE00000) 
#define LANCEEND	IO2(ushort, 0xF00000)
1992/0520/sys/src/9/power/io.h:9,17 – 1992/0527/sys/src/9/power/io.h:9,18 (short | long)
1990/0227    
#define	LED		((char*)0xBF200001)
1992/0508    
enum 
{ 
	LEDhotintr=	1<<0, 
	LEDclock=	1<<1, 
	LEDfault=	1<<2,
1992/0527    
	LEDtrapmask=	0xf<<0, 
	LEDhotintr=	1<<4, 
	LEDclock=	1<<5, 
	LEDfault=	1<<6,
1992/0509    
	LEDpulse=	1<<7,
1992/0508    
};
1992/0509    
#define LEDON(x) 	(m->ledval &= ~x, *LED = m->ledval)
1992/0527/sys/src/9/power/io.h:10,22 – 1992/0609/sys/src/9/power/io.h:10,22 (short | long)
1992/0508    
enum 
{
1992/0527    
	LEDtrapmask=	0xf<<0, 
	LEDhotintr=	1<<4,
1992/0609    
	LEDkfault=	1<<4,
1992/0527    
	LEDclock=	1<<5, 
	LEDfault=	1<<6,
1992/0509    
	LEDpulse=	1<<7,
1992/0508    
};
1992/0509    
#define LEDON(x) 	(m->ledval &= ~x, *LED = m->ledval) 
#define LEDOFF(x) 	(m->ledval |= x, *LED = m->ledval)
1992/0609    
#define LEDON(x) 	(m->ledval &= ~(x), *LED = m->ledval) 
#define LEDOFF(x) 	(m->ledval |= (x), *LED = m->ledval)
1990/0227    
 
typedef struct SBCC	SBCC; 
typedef struct Timer	Timer;
1992/0609/sys/src/9/power/io.h:110,112 – 1992/0610/sys/src/9/power/io.h:110,119 (short | long)
1990/1204    
#define	RTC		(NVRAM+0x3ff8)
1990/0718    
#define SBEADDR		((ulong *)(UNCACHED|0x1F080000))
1992/0610    
 
#define       PROM_RESET      0   /* run diags, check bootmode, reinit */ 
#define       PROM_EXEC       1   /* load new program image */ 
#define       PROM_RESTART    2   /* re-enter monitor command loop */ 
#define       PROM_REINIT     3   /* re-init monitor, then cmd loop */ 
#define       PROM_REBOOT     4   /* check bootmode, no config */ 
#define       PROM_AUTOBOOT   5   /* autoboot the system */
1992/0610/sys/src/9/power/io.h:117,119 – 1992/0612/sys/src/9/power/io.h:117,135 (short | long)
1992/0610    
#define       PROM_REINIT     3   /* re-init monitor, then cmd loop */ 
#define       PROM_REBOOT     4   /* check bootmode, no config */ 
#define       PROM_AUTOBOOT   5   /* autoboot the system */
1992/0612    
 
/* 
 *  hs datakit board 
 */ 
typedef struct HSdev	HSdev; 
struct HSdev { 
	ushort	version; 
	ushort	pad0x02; 
	ushort	vector; 
	ushort	pad0x06; 
	ushort	csr; 
	ushort	pad0x0A; 
	ushort	data; 
}; 
#define HSDEV		VMEA24SUP(HSdev, 0xF90000)
1992/0612/sys/src/9/power/io.h:15,22 – 1992/1128/sys/src/9/power/io.h:15,26 (short | long)
1992/0527    
	LEDfault=	1<<6,
1992/0509    
	LEDpulse=	1<<7,
1992/0508    
};
1992/1128    
/*
1992/0609    
#define LEDON(x) 	(m->ledval &= ~(x), *LED = m->ledval) 
#define LEDOFF(x) 	(m->ledval |= (x), *LED = m->ledval)
1992/1128    
*/ 
#define LEDON(x) 
#define LEDOFF(x)
1990/0227    
 
typedef struct SBCC	SBCC; 
typedef struct Timer	Timer;
1992/1128/sys/src/9/power/io.h:67,72 – 1992/1208/sys/src/9/power/io.h:67,81 (short | long)
1990/0911    
#define	WRITEMAP	IO2(ulong, 0xFA0000)
1990/1231    
#define LANCEINDEX	0x1E00			/* index of lancemap */
1990/0905    
1992/1208    
#define SCSI0ADDR	IO2(uchar, 0xF08007) 
#define SCSI0DATA	IO2(uchar, 0xF08107) 
#define SCSI1ADDR	IO2(uchar, 0xF0C007) 
#define SCSI1DATA	IO2(uchar, 0xF0C107) 
#define SCSI0CNT	IO2(ulong, 0xF54000) 
#define SCSI1CNT	IO2(ulong, 0xF58000) 
#define SCSI0FLS	IO2(uchar, 0xF30001) 
#define SCSI1FLS	IO2(uchar, 0xF34001)
1990/0825    
#define IOID		IO2(uchar, 0xFFFFF0) 
#define IO2R1		1	/* IO2 revision level 1 */ 
#define IO2R2		2	/* IO2 revision level 2 */
1992/1208/sys/src/9/power/io.h:10,26 – 1993/0211/sys/src/9/power/io.h:10,24 (short | long)
1992/0508    
enum 
{
1992/0527    
	LEDtrapmask=	0xf<<0,
1993/0211    
	LED2=		1<<2, 
	LED3=		1<<3,
1992/0609    
	LEDkfault=	1<<4,
1992/0527    
	LEDclock=	1<<5,
1993/0211    
	LED5=		1<<5,
1992/0527    
	LEDfault=	1<<6,
1992/0509    
	LEDpulse=	1<<7,
1992/0508    
};
1992/1128    
/*
1992/0609    
#define LEDON(x) 	(m->ledval &= ~(x), *LED = m->ledval) 
#define LEDOFF(x) 	(m->ledval |= (x), *LED = m->ledval)
1992/1128    
*/ 
#define LEDON(x) 
#define LEDOFF(x)
1990/0227    
 
typedef struct SBCC	SBCC; 
typedef struct Timer	Timer;
Too many diffs (26 > 25). Stopping.


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