plan 9 kernel history: overview | file list | diff list

1992/0711/power/trap.c (diff list | history)

1990/0227/sys/src/9/power/trap.c:279,284 – 1990/03091/sys/src/9/power/trap.c:279,285 (short | long)
1990/0227    
			return str[i]; 
	return "no floating point exception"; 
}
1990/03091    
1990/0227    
void 
dumpstack(void) 
{
1990/0227/sys/src/9/power/trap.c:445,450 – 1990/03091/sys/src/9/power/trap.c:446,452
1990/0227    
	ur->pc += 4; 
	u->nerrlab = 0; 
	splhi();
1990/03091    
	u->p->insyscall = 0;
1990/0227    
	if(r1 == NOTED)	/* ugly hack */ 
		noted(&aur);	/* doesn't return */ 
	if(u->nnote){
1990/0227/sys/src/9/power/trap.c:451,457 – 1990/03091/sys/src/9/power/trap.c:453,458
1990/0227    
		ur->r1 = ret; 
		notify(ur); 
	} 
	u->p->insyscall = 0; 
	return ret; 
}
1990/03091/sys/src/9/power/trap.c:421,426 – 1990/0310/sys/src/9/power/trap.c:421,427 (short | long)
1990/0227    
 
	u->p->insyscall = 1; 
	ur = aur;
1990/0310    
	u->p->pc = ur->pc;		/* BUG */
1990/0227    
	/* 
	 * since the system call interface does not 
	 * guarantee anything about registers,
1990/0310/sys/src/9/power/trap.c:149,155 – 1990/0427/sys/src/9/power/trap.c:149,155 (short | long)
1990/0227    
			if(ecode == FPEXC) 
				sprint(buf, "fp: %s FCR31 %lux", fpexcname(x), x); 
			else 
				sprint(buf, "trap: %s", excname[ecode]);
1990/0427    
				sprint(buf, "trap: %s[%d]", excname[ecode], m->machno);
1990/0227    
			postnote(u->p, 1, buf, NDebug); 
		}else{ 
			print("%s %s pc=%lux\n", user? "user": "kernel", excname[ecode], ur->pc);
1990/0427/sys/src/9/power/trap.c:5,10 – 1990/0511/sys/src/9/power/trap.c:5,11 (short | long)
1990/0227    
#include	"fns.h" 
#include	"ureg.h" 
#include	"io.h"
1990/0511    
#include	"errno.h"
1990/0227    
 
/* 
 *  vme interrupt routines
1990/0427/sys/src/9/power/trap.c:418,423 – 1990/0511/sys/src/9/power/trap.c:419,425
1990/0227    
	ulong sp; 
	ulong r1; 
	Ureg *ur;
1990/0511    
	char *msg;
1990/0227    
 
	u->p->insyscall = 1; 
	ur = aur;
1990/0427/sys/src/9/power/trap.c:433,449 – 1990/0511/sys/src/9/power/trap.c:435,459
1990/0227    
	spllo(); 
	r1 = ur->r1; 
	sp = ur->sp; 
	if(r1 >= sizeof systab/BY2WD) 
		panic("syscall %d\n", r1); 
	if(sp & (BY2WD-1)) 
		panic("syscall odd sp"); 
	if(sp<(USTKTOP-BY2PG) || sp>(USTKTOP-4*BY2WD)) 
		validaddr(ur->sp, 4*BY2WD, 0); 
                 
	u->nerrlab = 0; 
	ret = -1; 
	if(!waserror())
1990/0511    
	if(!waserror()){ 
		if(r1 >= sizeof systab/BY2WD){ 
			pprint("bad sys call number %d pc %lux\n", r1, ((Ureg*)UREGADDR)->pc); 
			msg = "bad sys call"; 
	    Bad: 
			postnote(u->p, 1, msg, NDebug); 
			error(0, Ebadarg); 
		} 
		if(sp & (BY2WD-1)){ 
			pprint("odd sp in sys call pc %lux sp %lux\n", ((Ureg*)UREGADDR)->pc, ((Ureg*)UREGADDR)->sp); 
			msg = "odd stack"; 
			goto Bad; 
		} 
		if(sp<(USTKTOP-BY2PG) || sp>(USTKTOP-4*BY2WD)) 
			validaddr(ur->sp, 4*BY2WD, 0);
1990/0227    
		ret = (*systab[r1])((ulong*)(sp+2*BY2WD));
1990/0511    
	}
1990/0227    
	ur->pc += 4; 
	u->nerrlab = 0; 
	splhi();
1990/0511/sys/src/9/power/trap.c:451,457 – 1990/0515/sys/src/9/power/trap.c:451,457 (short | long)
1990/0511    
			goto Bad; 
		} 
		if(sp<(USTKTOP-BY2PG) || sp>(USTKTOP-4*BY2WD)) 
			validaddr(ur->sp, 4*BY2WD, 0);
1990/0515    
			validaddr(sp, 4*BY2WD, 0);
1990/0227    
		ret = (*systab[r1])((ulong*)(sp+2*BY2WD));
1990/0511    
	}
1990/0227    
	ur->pc += 4;
1990/0515/sys/src/9/power/trap.c:361,366 – 1990/0619/sys/src/9/power/trap.c:361,370 (short | long)
1990/0227    
noted(Ureg **urp) 
{ 
	lock(&u->p->debug);
1990/0619    
	if(!u->notified){ 
		unlock(&u->p->debug); 
		return; 
	}
1990/0227    
	u->notified = 0; 
	memcpy(*urp, u->ureg, sizeof(Ureg)); 
	unlock(&u->p->debug);
1990/0619/sys/src/9/power/trap.c:126,145 – 1990/0722/sys/src/9/power/trap.c:126,151 (short | long)
1990/0227    
		break; 
 
	case CCPU: 
		if(u->p->fpstate == FPinit) {
1990/0722    
		if(u && u->p && u->p->fpstate == FPinit) {
1990/0227    
			restfpregs(&initfp); 
			u->p->fpstate = FPactive; 
			ur->status |= CU1; 
			break; 
		} 
		if(u->p->fpstate == FPinactive) {
1990/0722    
		if(u && u->p && u->p->fpstate == FPinactive) {
1990/0227    
			restfpregs(&u->fpsave); 
			u->p->fpstate = FPactive; 
			ur->status |= CU1; 
			break; 
		}
1990/0722    
		goto Default;
1990/0227    
 
	default:
1990/0722    
		if(u && u->p && u->p->fpstate == FPactive){ 
			savefpregs(&u->fpsave); 
			u->p->fpstate = FPinactive; 
			ur->status &= ~CU1; 
		}
1990/0227    
	Default: 
		/* 
		 * This isn't good enough; can still deadlock because we may hold print's locks
1990/0619/sys/src/9/power/trap.c:433,439 – 1990/0722/sys/src/9/power/trap.c:439,445
1990/0227    
	 * guarantee anything about registers, 
	 */ 
	if(u->p->fpstate == FPactive) { 
		u->p->fpstate = FPinit;		/* BUG */
1990/0722    
		u->p->fpstate = FPinit;
1990/0227    
		ur->status &= ~CU1; 
	} 
	spllo();
1990/0722/sys/src/9/power/trap.c:101,111 – 1990/0731/sys/src/9/power/trap.c:101,112 (short | long)
1990/0227    
			} 
			m->intr = intr; 
			m->cause = ur->cause;
1990/0731    
			m->pc = ur->pc;
1990/0227    
			if(ur->cause & INTR2) 
				m->intrp = u->p; 
			sched(); 
		}else 
			intr(ur->cause);
1990/0731    
			intr(ur->cause, ur->pc);
1990/0227    
		break; 
 
	case CTLBM:
1990/0722/sys/src/9/power/trap.c:179,185 – 1990/0731/sys/src/9/power/trap.c:180,186
1990/0227    
} 
 
void 
intr(ulong cause)
1990/0731    
intr(ulong cause, ulong pc)
1990/0227    
{ 
	int i, pend; 
	long v;
1990/0722/sys/src/9/power/trap.c:186,192 – 1990/0731/sys/src/9/power/trap.c:187,193
1990/0227    
 
	cause &= INTR5|INTR4|INTR3|INTR2|INTR1; 
	if(cause & (INTR2|INTR4)){ 
		clock(cause);
1990/0731    
		clock(cause, pc);
1990/0227    
		cause &= ~(INTR2|INTR4); 
	} 
	if(cause & INTR1){
1990/0731/sys/src/9/power/trap.c:113,119 – 1990/0802/sys/src/9/power/trap.c:113,119 (short | long)
1990/0227    
	case CTLBL: 
	case CTLBS: 
		if(u == 0) 
			panic("fault");
1990/0802    
			panic("fault u==0 pc %lux addr %lux", ur->pc, ur->badvaddr);
1990/0227    
		if(u->p->fpstate == FPactive) { 
			savefpregs(&u->fpsave); 
			u->p->fpstate = FPinactive;
1990/0802/sys/src/9/power/trap.c:342,348 – 1990/0816/sys/src/9/power/trap.c:342,348 (short | long)
1990/0227    
	if(!u->notified){ 
		if(!u->notify) 
			goto Die; 
		sp = ur->sp;
1990/0816    
		sp = ur->usp;
1990/0227    
		sp -= sizeof(Ureg); 
		u->ureg = (void*)sp; 
		memcpy((Ureg*)sp, ur, sizeof(Ureg));
1990/0802/sys/src/9/power/trap.c:352,358 – 1990/0816/sys/src/9/power/trap.c:352,358
1990/0227    
		*(ulong*)(sp+2*BY2WD) = sp+3*BY2WD;	/* arg 2 is string */ 
		*(ulong*)(sp+1*BY2WD) = (ulong)u->ureg;	/* arg 1 is ureg* */ 
		*(ulong*)(sp+0*BY2WD) = 0;		/* arg 0 is pc */ 
		ur->sp = sp;
1990/0816    
		ur->usp = sp;
1990/0227    
		ur->pc = (ulong)u->notify; 
		u->notified = 1; 
		u->nnote--;
1990/0816/sys/src/9/power/trap.c:230,245 – 1990/0826/sys/src/9/power/trap.c:230,256 (short | long)
1990/0227    
	loop: 
		if(pend & 1) { 
			v = INTVECREG->i[0].vec; 
/* a botch, bit 12 seems to always be on 
			if(v & (1<<12))
1990/0826    
			if(!(v & (1<<12)))
1990/0227    
				print("io2 mp bus error %d\n", 0); 
 */ 
			if(!(v & (1<<2))) 
				lanceintr(); 
			if(!(v & (1<<1))) 
				lanceparity(); 
			if(!(v & (1<<0))) 
				print("SCSI interrupt\n");
1990/0826    
			switch(ioid){ 
			case IO2R1: 
			case IO2R2: 
				if(!(v & (1<<2))) 
					lanceintr(); 
				if(!(v & (1<<1))) 
					lanceparity(); 
				if(!(v & (1<<0))) 
					print("SCSI interrupt\n"); 
				break; 
			case IO3R1: 
				if(v & (1<<2)) 
					lance3intr(); 
				if(v & (1<<1)) 
					print("SCSI 1 interrupt\n"); 
				if(v & (1<<0)) 
					print("SCSI 0 interrupt\n"); 
				break; 
			}
1990/0227    
		} 
		/* 
		 *  5b. process vme
1990/0816/sys/src/9/power/trap.c:249,258 – 1990/0826/sys/src/9/power/trap.c:260,267
1990/0227    
		for(i=1; pend; i++) { 
			if(pend & 1) { 
				v = INTVECREG->i[i].vec; 
/* a botch, bit 12 seems to always be on 
				if(v & (1<<12))
1990/0826    
				if(!(v & (1<<12)))
1990/0227    
					print("io2 mp bus error %d\n", i); 
 */ 
				v &= 0xff; 
				(*vmevec[v])(v); 
			}
1990/0816/sys/src/9/power/trap.c:392,398 – 1990/0826/sys/src/9/power/trap.c:401,407
1990/0227    
 
Syscall *systab[]={ 
	[SYSR1]		sysr1, 
	[ACCESS]	sysaccess,
1990/0826    
	[___ACCESS___]	sysaccess,
1990/0227    
	[BIND]		sysbind, 
	[CHDIR]		syschdir, 
	[CLOSE]		sysclose,
1990/0826/sys/src/9/power/trap.c:197,203 – 1990/0830/sys/src/9/power/trap.c:197,203 (short | long)
1990/0227    
	if(cause & INTR5){ 
 
		if(!(*MPBERR1 & (1<<8))){ 
/*			print("MP bus error %lux\n", *MPBERR0); /**/
1990/0830    
			print("MP bus error %lux %lux\n", *MPBERR0, *MPBERR1); /**/
1990/0227    
			*MPBERR0 = 0; 
			i = *SBEADDR; 
		}
1990/0826/sys/src/9/power/trap.c:230,237 – 1990/0830/sys/src/9/power/trap.c:230,240
1990/0227    
	loop: 
		if(pend & 1) { 
			v = INTVECREG->i[0].vec;
1990/0826    
			if(!(v & (1<<12)))
1990/0227    
				print("io2 mp bus error %d\n", 0);
1990/0830    
			if(!(v & (1<<12))){ 
				print("io2 mp bus error %d %lux %lux\n", 0, 
					*MPBERR0, *MPBERR1); 
				*MPBERR0 = 0; 
			}
1990/0826    
			switch(ioid){ 
			case IO2R1: 
			case IO2R2:
1990/0826/sys/src/9/power/trap.c:260,267 – 1990/0830/sys/src/9/power/trap.c:263,273
1990/0227    
		for(i=1; pend; i++) { 
			if(pend & 1) { 
				v = INTVECREG->i[i].vec;
1990/0826    
				if(!(v & (1<<12)))
1990/0227    
					print("io2 mp bus error %d\n", i);
1990/0830    
				if(!(v & (1<<12))){ 
					print("io2 mp bus error %d %lux %lux\n", i, 
						*MPBERR0, *MPBERR1); 
					*MPBERR0 = 0; 
				}
1990/0227    
				v &= 0xff; 
				(*vmevec[v])(v); 
			}
1990/0830/sys/src/9/power/trap.c:42,48 – 1990/0901/sys/src/9/power/trap.c:42,48 (short | long)
1990/0227    
	"arithmetic overflow", 
	"undefined 13", 
	"undefined 14", 
	"undefined 15",
1990/0901    
	"undefined 15",				/* used as sys call for debugger */
1990/0227    
	/* the following is made up */ 
	"floating point exception"		/* FPEXC */ 
};
1990/0830/sys/src/9/power/trap.c:450,455 – 1990/0901/sys/src/9/power/trap.c:450,456
1990/0227    
	u->p->insyscall = 1; 
	ur = aur;
1990/0310    
	u->p->pc = ur->pc;		/* BUG */
1990/0901    
	ur->cause = 15<<2;		/* for debugging: system call is undef 15;
1990/0227    
	/* 
	 * since the system call interface does not 
	 * guarantee anything about registers,
1990/0901/sys/src/9/power/trap.c:180,185 – 1990/0905/sys/src/9/power/trap.c:180,193 (short | long)
1990/0227    
} 
 
void
1990/0905    
mpbuserror(void) 
{ 
	print("io2 mp bus error %d %lux %lux\n", 0, 
		*MPBERR0, *MPBERR1); 
	*MPBERR0 = 0; 
} 
 
void
1990/0731    
intr(ulong cause, ulong pc)
1990/0227    
{ 
	int i, pend;
1990/0901/sys/src/9/power/trap.c:227,260 – 1990/0905/sys/src/9/power/trap.c:235,269
1990/0227    
		/* 
		 *  5a. process lance, scsi 
		 */ 
	loop: 
		if(pend & 1) { 
			v = INTVECREG->i[0].vec;
1990/0830    
			if(!(v & (1<<12))){ 
				print("io2 mp bus error %d %lux %lux\n", 0, 
					*MPBERR0, *MPBERR1); 
				*MPBERR0 = 0; 
			}
1990/0826    
			switch(ioid){ 
			case IO2R1: 
			case IO2R2: 
				if(!(v & (1<<2))) 
					lanceintr(); 
				if(!(v & (1<<1))) 
					lanceparity(); 
				if(!(v & (1<<0))) 
					print("SCSI interrupt\n"); 
				break; 
			case IO3R1: 
				if(v & (1<<2)) 
					lance3intr(); 
				if(v & (1<<1)) 
					print("SCSI 1 interrupt\n"); 
				if(v & (1<<0)) 
					print("SCSI 0 interrupt\n"); 
				break; 
			}
1990/0905    
			if(!(v & (1<<12))) 
				mpbuserror(); 
			if(!(v & (1<<2))) 
				lanceintr(); 
			if(!(v & (1<<1))) 
				lanceparity(); 
			if(!(v & (1<<0))) 
				print("SCSI interrupt\n");
1990/0227    
		}
1990/0905    
		if(pend & (1<<10)) { 
			v = INTVECREG->i[10].vec; 
			if(!(v & (1<<12))) 
				mpbuserror(); 
			lance3intr(); 
		} 
		if(pend & (1<<8)) { 
			v = INTVECREG->i[10].vec; 
			if(!(v & (1<<12))) 
				mpbuserror(); 
			print("SCSI0 interrupt\n"); 
		} 
		if(pend & (1<<9)) { 
			v = INTVECREG->i[10].vec; 
			if(!(v & (1<<12))) 
				mpbuserror(); 
			print("SCSI1 interrupt\n"); 
		}
1990/0227    
		/* 
		 *  5b. process vme 
		 *  i bet i can guess your level
1990/0901/sys/src/9/power/trap.c:263,273 – 1990/0905/sys/src/9/power/trap.c:272,279
1990/0227    
		for(i=1; pend; i++) { 
			if(pend & 1) { 
				v = INTVECREG->i[i].vec;
1990/0830    
				if(!(v & (1<<12))){ 
					print("io2 mp bus error %d %lux %lux\n", i, 
						*MPBERR0, *MPBERR1); 
					*MPBERR0 = 0; 
				}
1990/0905    
				if(!(v & (1<<12))) 
					mpbuserror();
1990/0227    
				v &= 0xff; 
				(*vmevec[v])(v); 
			}
1990/0901/sys/src/9/power/trap.c:276,282 – 1990/0905/sys/src/9/power/trap.c:282,288
1990/0227    
		/* 
		 *  6. re-enable interrupts 
		 */ 
		*IO2SETMASK = 0xff;
1990/0905    
		*IO2SETMASK = iomask;
1990/0227    
		cause &= ~INTR5; 
	} 
	if(cause)
1990/0905/sys/src/9/power/trap.c:180,193 – 1990/0907/sys/src/9/power/trap.c:180,185 (short | long)
1990/0227    
} 
 
void
1990/0905    
mpbuserror(void) 
{ 
	print("io2 mp bus error %d %lux %lux\n", 0, 
		*MPBERR0, *MPBERR1); 
	*MPBERR0 = 0; 
} 
                 
void
1990/0731    
intr(ulong cause, ulong pc)
1990/0227    
{ 
	int i, pend;
1990/0905/sys/src/9/power/trap.c:205,211 – 1990/0907/sys/src/9/power/trap.c:197,203
1990/0227    
	if(cause & INTR5){ 
 
		if(!(*MPBERR1 & (1<<8))){
1990/0830    
			print("MP bus error %lux %lux\n", *MPBERR0, *MPBERR1); /**/
1990/0907    
			iprint("MP bus error %lux %lux\n", *MPBERR0, *MPBERR1); /**/
1990/0227    
			*MPBERR0 = 0; 
			i = *SBEADDR; 
		}
1990/0905/sys/src/9/power/trap.c:235,269 – 1990/0907/sys/src/9/power/trap.c:227,260
1990/0227    
		/* 
		 *  5a. process lance, scsi 
		 */
1990/0907    
	loop:
1990/0227    
		if(pend & 1) { 
			v = INTVECREG->i[0].vec;
1990/0905    
			if(!(v & (1<<12))) 
				mpbuserror(); 
			if(!(v & (1<<2))) 
				lanceintr(); 
			if(!(v & (1<<1))) 
				lanceparity(); 
			if(!(v & (1<<0))) 
				print("SCSI interrupt\n");
1990/0907    
			if(!(v & (1<<12))){ 
				print("io2 mp bus error %d %lux %lux\n", 0, 
					*MPBERR0, *MPBERR1); 
				*MPBERR0 = 0; 
			} 
			switch(ioid){ 
			case IO2R1: 
			case IO2R2: 
				if(!(v & (1<<2))) 
					lanceintr(); 
				if(!(v & (1<<1))) 
					lanceparity(); 
				if(!(v & (1<<0))) 
					print("SCSI interrupt\n"); 
				break; 
			case IO3R1: 
				if(v & (1<<2)) 
					lance3intr(); 
				if(v & (1<<1)) 
					print("SCSI 1 interrupt\n"); 
				if(v & (1<<0)) 
					print("SCSI 0 interrupt\n"); 
				break; 
			}
1990/0227    
		}
1990/0905    
		if(pend & (1<<10)) { 
			v = INTVECREG->i[10].vec; 
			if(!(v & (1<<12))) 
				mpbuserror(); 
			lance3intr(); 
		} 
		if(pend & (1<<8)) { 
			v = INTVECREG->i[10].vec; 
			if(!(v & (1<<12))) 
				mpbuserror(); 
			print("SCSI0 interrupt\n"); 
		} 
		if(pend & (1<<9)) { 
			v = INTVECREG->i[10].vec; 
			if(!(v & (1<<12))) 
				mpbuserror(); 
			print("SCSI1 interrupt\n"); 
		}
1990/0227    
		/* 
		 *  5b. process vme 
		 *  i bet i can guess your level
1990/0905/sys/src/9/power/trap.c:272,279 – 1990/0907/sys/src/9/power/trap.c:263,273
1990/0227    
		for(i=1; pend; i++) { 
			if(pend & 1) { 
				v = INTVECREG->i[i].vec;
1990/0905    
				if(!(v & (1<<12))) 
					mpbuserror();
1990/0907    
				if(!(v & (1<<12))){ 
					print("io2 mp bus error %d %lux %lux\n", i, 
						*MPBERR0, *MPBERR1); 
					*MPBERR0 = 0; 
				}
1990/0227    
				v &= 0xff; 
				(*vmevec[v])(v); 
			}
1990/0905/sys/src/9/power/trap.c:282,288 – 1990/0907/sys/src/9/power/trap.c:276,282
1990/0227    
		/* 
		 *  6. re-enable interrupts 
		 */
1990/0905    
		*IO2SETMASK = iomask;
1990/0907    
		*IO2SETMASK = 0xff;
1990/0227    
		cause &= ~INTR5; 
	} 
	if(cause)
1990/0907/sys/src/9/power/trap.c:197,203 – 1990/0911/sys/src/9/power/trap.c:197,203 (short | long)
1990/0227    
	if(cause & INTR5){ 
 
		if(!(*MPBERR1 & (1<<8))){
1990/0907    
			iprint("MP bus error %lux %lux\n", *MPBERR0, *MPBERR1); /**/
1990/0911    
			print("MP bus error %lux %lux\n", *MPBERR0, *MPBERR1);
1990/0227    
			*MPBERR0 = 0; 
			i = *SBEADDR; 
		}
1990/0907/sys/src/9/power/trap.c:235,243 – 1990/0911/sys/src/9/power/trap.c:235,241
1990/0907    
					*MPBERR0, *MPBERR1); 
				*MPBERR0 = 0; 
			} 
			switch(ioid){ 
			case IO2R1: 
			case IO2R2:
1990/0911    
			if(ioid < IO3R1){
1990/0907    
				if(!(v & (1<<2))) 
					lanceintr(); 
				if(!(v & (1<<1)))
1990/0907/sys/src/9/power/trap.c:244,258 – 1990/0911/sys/src/9/power/trap.c:242,254
1990/0907    
					lanceparity(); 
				if(!(v & (1<<0))) 
					print("SCSI interrupt\n"); 
				break; 
			case IO3R1:
1990/0911    
			} else {
1990/0907    
				if(v & (1<<2)) 
					lance3intr();
1990/0911    
					lanceintr();
1990/0907    
				if(v & (1<<1)) 
					print("SCSI 1 interrupt\n"); 
				if(v & (1<<0)) 
					print("SCSI 0 interrupt\n"); 
				break; 
			}
1990/0227    
		} 
		/*
1990/0911/sys/src/9/power/trap.c:155,163 – 1990/1110/sys/src/9/power/trap.c:155,163 (short | long)
1990/0227    
		if(user){ 
			spllo(); 
			if(ecode == FPEXC) 
				sprint(buf, "fp: %s FCR31 %lux", fpexcname(x), x);
1990/1110    
				sprint(buf, "sys: fp: %s FCR31 %lux", fpexcname(x), x);
1990/0227    
			else
1990/0427    
				sprint(buf, "trap: %s[%d]", excname[ecode], m->machno);
1990/1110    
				sprint(buf, "sys: trap: %s[%d]", excname[ecode], m->machno);
1990/0227    
			postnote(u->p, 1, buf, NDebug); 
		}else{ 
			print("%s %s pc=%lux\n", user? "user": "kernel", excname[ecode], ur->pc);
1990/0911/sys/src/9/power/trap.c:463,469 – 1990/1110/sys/src/9/power/trap.c:463,469
1990/0511    
	if(!waserror()){ 
		if(r1 >= sizeof systab/BY2WD){ 
			pprint("bad sys call number %d pc %lux\n", r1, ((Ureg*)UREGADDR)->pc); 
			msg = "bad sys call";
1990/1110    
			msg = "sys: bad sys call";
1990/0511    
	    Bad: 
			postnote(u->p, 1, msg, NDebug); 
			error(0, Ebadarg);
1990/0911/sys/src/9/power/trap.c:470,476 – 1990/1110/sys/src/9/power/trap.c:470,476
1990/0511    
		} 
		if(sp & (BY2WD-1)){ 
			pprint("odd sp in sys call pc %lux sp %lux\n", ((Ureg*)UREGADDR)->pc, ((Ureg*)UREGADDR)->sp); 
			msg = "odd stack";
1990/1110    
			msg = "sys: odd stack";
1990/0511    
			goto Bad; 
		} 
		if(sp<(USTKTOP-BY2PG) || sp>(USTKTOP-4*BY2WD))
1990/1110/sys/src/9/power/trap.c:385,390 – 1990/1113/sys/src/9/power/trap.c:385,391 (short | long)
1990/0619    
	}
1990/0227    
	u->notified = 0; 
	memcpy(*urp, u->ureg, sizeof(Ureg));
1990/1113    
	(*urp)->r1 = -1;	/* return error from the interrupted call */
1990/0227    
	unlock(&u->p->debug); 
	splhi(); 
	rfnote(urp);
1990/1113/sys/src/9/power/trap.c:327,333 – 1990/11211/sys/src/9/power/trap.c:327,332 (short | long)
1990/0227    
	l = &ur->status; 
	for(i=0; i<sizeof regname/sizeof(char*); i+=2, l+=2) 
		print("%s\t%.8lux\t%s\t%.8lux\n", regname[i], l[0], regname[i+1], l[1]); 
	dumpstack(); 
} 
 
/*
1990/1113/sys/src/9/power/trap.c:393,421 – 1990/11211/sys/src/9/power/trap.c:392,420
1990/0227    
 
 
#undef	CHDIR	/* BUG */ 
#include "/sys/src/libc/mips9sys/sys.h"
1990/11211    
#include "/sys/src/libc/Nmips9sys/sys.h"
1990/0227    
 
typedef long Syscall(ulong*); 
Syscall sysaccess, sysbind, sysbrk_, syschdir, sysclose, syscreate;
1990/11211    
Syscall sysbind, sysbrk_, syschdir, sysclose, syscreate, sysdeath;
1990/0227    
Syscall	sysdup, syserrstr, sysexec, sysexits, sysfork, sysforkpgrp; 
Syscall	sysfstat, sysfwstat, sysgetpid, syslasterr, sysmount, sysnoted;
1990/11211    
Syscall	sysfstat, sysfwstat, sysgetpid, sysmount, sysnoted;
1990/0227    
Syscall	sysnotify, sysopen, syspipe, sysr1, sysread, sysremove, sysseek; 
Syscall syssleep, sysstat, sysuserstr, syswait, syswrite, syswstat;
1990/11211    
Syscall syssleep, sysstat, syswait, syswrite, syswstat;
1990/0227    
 
Syscall *systab[]={ 
	[SYSR1]		sysr1,
1990/0826    
	[___ACCESS___]	sysaccess,
1990/11211    
	[ERRSTR]	syserrstr,
1990/0227    
	[BIND]		sysbind, 
	[CHDIR]		syschdir, 
	[CLOSE]		sysclose, 
	[DUP]		sysdup, 
	[ERRSTR]	syserrstr,
1990/11211    
	[___ERRSTR___]	sysdeath,
1990/0227    
	[EXEC]		sysexec, 
	[EXITS]		sysexits, 
	[FORK]		sysfork, 
	[FORKPGRP]	sysforkpgrp, 
	[FSTAT]		sysfstat, 
	[LASTERR]	syslasterr,
1990/11211    
	[___LASTERR___]	sysdeath,
1990/0227    
	[MOUNT]		sysmount, 
	[OPEN]		sysopen, 
	[READ]		sysread,
1990/1113/sys/src/9/power/trap.c:426,432 – 1990/11211/sys/src/9/power/trap.c:425,431
1990/0227    
	[WRITE]		syswrite, 
	[PIPE]		syspipe, 
	[CREATE]	syscreate, 
	[USERSTR]	sysuserstr,
1990/11211    
	[___USERSTR___]	sysdeath,
1990/0227    
	[BRK_]		sysbrk_, 
	[REMOVE]	sysremove, 
	[WSTAT]		syswstat,
1990/1113/sys/src/9/power/trap.c:467,473 – 1990/11211/sys/src/9/power/trap.c:466,472
1990/1110    
			msg = "sys: bad sys call";
1990/0511    
	    Bad: 
			postnote(u->p, 1, msg, NDebug); 
			error(0, Ebadarg);
1990/11211    
			error(Ebadarg);
1990/0511    
		} 
		if(sp & (BY2WD-1)){ 
			pprint("odd sp in sys call pc %lux sp %lux\n", ((Ureg*)UREGADDR)->pc, ((Ureg*)UREGADDR)->sp);
1990/1113/sys/src/9/power/trap.c:474,481 – 1990/11211/sys/src/9/power/trap.c:473,480
1990/1110    
			msg = "sys: odd stack";
1990/0511    
			goto Bad; 
		} 
		if(sp<(USTKTOP-BY2PG) || sp>(USTKTOP-4*BY2WD))
1990/0515    
			validaddr(sp, 4*BY2WD, 0);
1990/11211    
		if(sp<(USTKTOP-BY2PG) || sp>(USTKTOP-5*BY2WD)) 
			validaddr(sp, 5*BY2WD, 0);
1990/0227    
		ret = (*systab[r1])((ulong*)(sp+2*BY2WD));
1990/0511    
	}
1990/0227    
	ur->pc += 4;
1990/1113/sys/src/9/power/trap.c:491,507 – 1990/11211/sys/src/9/power/trap.c:490,508
1990/0227    
	return ret; 
}
1990/11211    
#include "errstr.h"
1990/0227    
void 
error(Chan *c, int code)
1990/11211    
error(int code)
1990/0227    
{ 
	if(c){ 
		u->error.type = c->type; 
		u->error.dev = c->dev; 
	}else{ 
		u->error.type = 0; 
		u->error.dev = 0; 
	} 
	u->error.code = code;
1990/11211    
	strncpy(u->error, errstrtab[code], NAMELEN); 
	nexterror(); 
} 
 
void 
errors(char *err) 
{ 
	strncpy(u->error, err, NAMELEN);
1990/0227    
	nexterror(); 
}
1990/11211/sys/src/9/power/trap.c:392,398 – 1990/1122/sys/src/9/power/trap.c:392,398 (short | long)
1990/0227    
 
 
#undef	CHDIR	/* BUG */
1990/11211    
#include "/sys/src/libc/Nmips9sys/sys.h"
1990/1122    
#include "/sys/src/libc/mips9sys/sys.h"
1990/0227    
 
typedef long Syscall(ulong*);
1990/11211    
Syscall sysbind, sysbrk_, syschdir, sysclose, syscreate, sysdeath;
1990/1122/sys/src/9/power/trap.c:122,128 – 1990/1212/sys/src/9/power/trap.c:122,128 (short | long)
1990/0227    
		spllo(); 
		x = u->p->insyscall; 
		u->p->insyscall = 1; 
		fault(ur, user, ecode);
1990/1212    
		faultmips(ur, user, ecode);
1990/0227    
		u->p->insyscall = x; 
		break;
1990/1212/sys/src/9/power/trap.c:80,85 – 1990/1214/sys/src/9/power/trap.c:80,86 (short | long)
1990/0227    
	ulong x; 
	char buf[ERRLEN];
1990/1214    
	SET(x);
1990/0227    
	ecode = EXCCODE(ur->cause); 
	user = ur->status&KUP; 
	if(u)
1990/1212/sys/src/9/power/trap.c:200,205 – 1990/1214/sys/src/9/power/trap.c:201,207
1990/0911    
			print("MP bus error %lux %lux\n", *MPBERR0, *MPBERR1);
1990/0227    
			*MPBERR0 = 0; 
			i = *SBEADDR;
1990/1214    
			USED(i);
1990/0227    
		} 
 
		/*
1990/1212/sys/src/9/power/trap.c:223,228 – 1990/1214/sys/src/9/power/trap.c:225,231
1990/0227    
		 *  4. clear pending register 
		 */ 
		i = SBCCREG->flevel;
1990/1214    
		USED(i);
1990/0227    
 
		/* 
		 *  5a. process lance, scsi
1990/1214/sys/src/9/power/trap.c:493,498 – 1990/1226/sys/src/9/power/trap.c:493,504 (short | long)
1990/0227    
	return ret; 
}
1990/1226    
void 
execpc(ulong entry) 
{ 
	((Ureg*)UREGADDR)->pc = entry - 4;		/* syscall advances it */ 
}
1990/11211    
#include "errstr.h"
1990/0227    
void
1990/1226/sys/src/9/power/trap.c:504,510 – 1991/0115/sys/src/9/power/trap.c:504,510 (short | long)
1990/0227    
void
1990/11211    
error(int code)
1990/0227    
{
1990/11211    
	strncpy(u->error, errstrtab[code], NAMELEN);
1991/0115    
	strncpy(u->error, errstrtab[code], ERRLEN);
1990/11211    
	nexterror(); 
}
1991/0115/sys/src/9/power/trap.c:12,18 – 1991/0209/sys/src/9/power/trap.c:12,17 (short | long)
1990/0227    
 */ 
void	(*vmevec[256])(int); 
 
void	notify(Ureg*); 
void	noted(Ureg**); 
void	rfnote(Ureg**);
1991/0115/sys/src/9/power/trap.c:87,93 – 1991/0209/sys/src/9/power/trap.c:86,91
1990/0227    
		u->p->pc = ur->pc;		/* BUG */ 
	switch(ecode){ 
	case CINT: 
		m->intrp = 0; 
		if(u && u->p->state==Running){ 
			if(u->p->fpstate == FPactive) { 
				if(ur->cause & INTR3){	/* FP trap */
1991/0115/sys/src/9/power/trap.c:100,113 – 1991/0209/sys/src/9/power/trap.c:98,105
1990/0227    
				if(ecode == FPEXC) 
					goto Default; 
			} 
			m->intr = intr; 
			m->cause = ur->cause;
1990/0731    
			m->pc = ur->pc;
1990/0227    
			if(ur->cause & INTR2) 
				m->intrp = u->p; 
			sched(); 
		}else
1990/0731    
			intr(ur->cause, ur->pc);
1991/0209    
		} 
		intr(ur);
1990/0227    
		break; 
 
	case CTLBM:
1991/0115/sys/src/9/power/trap.c:181,194 – 1991/0209/sys/src/9/power/trap.c:173,187
1990/0227    
} 
 
void
1990/0731    
intr(ulong cause, ulong pc)
1991/0209    
intr(Ureg *ur)
1990/0227    
{ 
	int i, pend; 
	long v;
1991/0209    
	ulong cause;
1990/0227    
 
	cause &= INTR5|INTR4|INTR3|INTR2|INTR1;
1991/0209    
	cause = ur->cause&(INTR5|INTR4|INTR3|INTR2|INTR1);
1990/0227    
	if(cause & (INTR2|INTR4)){
1990/0731    
		clock(cause, pc);
1991/0209    
		clock(ur);
1990/0227    
		cause &= ~(INTR2|INTR4); 
	} 
	if(cause & INTR1){
Too many diffs (26 > 25). Stopping.


source code copyright © 1990-2005 Lucent Technologies; see license
Plan 9 distribution
comments to russ cox (rsc@swtch.com)