1994/0307/carrera/l.s (diff list | history)

1993/0903/sys/src/9/carrera/l.s:417,423 – 1993/0904/sys/src/9/carrera/l.s:417,423 (short | long)
1993/0903		MOVW $setR30(SB), R30 CONST (MACHADDR, R1) ADDU R1, R(MACH) /* R(MACH) = m-> */
1993/0904		MOVW R1, R(MACH) /* R(MACH) = m-> */
1993/0903		MOVW 8(R(MACH)), R(USER) /* up = m->proc */ MOVW 4(SP), R1 /* first arg for syscall/trap */ BNE R26, notsys
1993/0903/sys/src/9/carrera/l.s:744,760 – 1993/0904/sys/src/9/carrera/l.s:744,766
1993/0903		MOVW 4(FP), R9 MOVW $0, M(STATUS) WAIT
1993/0904		ADDU R1, R9 /* R9 = last address */ MOVW $(~0x3f), R8 AND R1, R8 /* R8 = first address, rounded down */ ADD $0x3f, R9 AND $(~0x3f), R9 /* round last address up */ SUB R8, R9 /* R9 = revised count */
1993/0903		icflush1: /* primary cache line size is 16 bytes */ /* * Due to a challenge bug PD+HWB DOES NOT WORK - philw */ WAIT WAIT CACHE SD+HWBI, (R1) WAIT WAIT SUBU $128, R9 ADDU $128, R1
1993/0904		CACHE PD+HWB, 0x00(R8) CACHE PI+HI, 0x00(R8) CACHE PD+HWB, 0x10(R8) CACHE PI+HI, 0x10(R8) CACHE PD+HWB, 0x20(R8) CACHE PI+HI, 0x20(R8) CACHE PD+HWB, 0x30(R8) CACHE PI+HI, 0x30(R8) SUB $0x40, R9 ADD $0x40, R8
1993/0903		BGTZ R9, icflush1 MOVW R10, M(STATUS) WAIT
1993/0903/sys/src/9/carrera/l.s:782,792 – 1993/0904/sys/src/9/carrera/l.s:788,801
1993/0903		WAIT MOVW $0, M(STATUS) WAIT MOVW $(4*1024*1024), R9
1993/0904		MOVW $(32*1024), R9
1993/0903		ccache: CACHE SD+IWBI, 0x00(R1) SUBU $128, R9 ADDU $128, R1
1993/0904		CACHE PD+IWBI, 0x00(R1) WAIT CACHE PI+IWBI, 0x00(R1) WAIT SUBU $16, R9 ADDU $16, R1
1993/0903		BGTZ R9, ccache MOVW R10, M(STATUS) WAIT
1993/0904/sys/src/9/carrera/l.s:738,749 – 1993/0907/sys/src/9/carrera/l.s:738,750 (short | long)
1993/0903		* we avoid using R4, R5, R6, and R7 so gotopc can call us without saving them */ TEXT icflush(SB), $-4 /* icflush(virtaddr, count) */                  MOVW M(STATUS), R10 WAIT MOVW 4(FP), R9 MOVW $0, M(STATUS) WAIT
1993/0907		WAIT WAIT
1993/0904		ADDU R1, R9 /* R9 = last address */ MOVW $(~0x3f), R8 AND R1, R8 /* R8 = first address, rounded down */
1993/0904/sys/src/9/carrera/l.s:764,784 – 1993/0907/sys/src/9/carrera/l.s:765,800
1993/0903		BGTZ R9, icflush1 MOVW R10, M(STATUS) WAIT
1993/0907		WAIT WAIT
1993/0903		RET TEXT dcinvalidate(SB), $-4 /* dcinvalidate(virtaddr, count) */
1993/0907		TEXT icdirty(SB), $-4 /* icdirty(virtaddr, count) */
1993/0903		MOVW M(STATUS), R10 WAIT MOVW $0, M(STATUS) WAIT
1993/0907		WAIT
1993/0903		MOVW 4(FP), R9 dcinval: /* secondary cache line size is 128 bytes */ CACHE SD+HWBI, 0x00(R1) SUBU $128, R9 ADDU $128, R1 BGTZ R9, dcinval
1993/0907		MOVW $0, M(STATUS) WAIT ADDU R1, R9 /* R9 = last address */ MOVW $(~0x3f), R8 AND R1, R8 /* R8 = first address, rounded down */ ADD $0x3f, R9 AND $(~0x3f), R9 /* round last address up */ SUB R8, R9 /* R9 = revised count */ icdirty1: /* primary cache line size is 16 bytes */ CACHE PI+HI, 0x00(R8) CACHE PI+HI, 0x10(R8) CACHE PI+HI, 0x20(R8) CACHE PI+HI, 0x30(R8) SUB $0x40, R9 ADD $0x40, R8 BGTZ R9, icdirty1
1993/0903		MOVW R10, M(STATUS)
1993/0907		WAIT WAIT
1993/0903		WAIT RET
1993/0907/sys/src/9/carrera/l.s:769,780 – 1993/0918/sys/src/9/carrera/l.s:769,778 (short | long)
1993/0907		WAIT
1993/0903		RET
1993/0907		TEXT icdirty(SB), $-4 /* icdirty(virtaddr, count) */
1993/0918		TEXT dcflush(SB), $-4 /* dcflush(virtaddr, count) */
1993/0903		MOVW M(STATUS), R10 WAIT WAIT
1993/0907		WAIT
1993/0903		MOVW 4(FP), R9
1993/0907		MOVW $0, M(STATUS) WAIT
1993/0907/sys/src/9/carrera/l.s:784,800 – 1993/0918/sys/src/9/carrera/l.s:782,800
1993/0907		ADD $0x3f, R9 AND $(~0x3f), R9 /* round last address up */ SUB R8, R9 /* R9 = revised count */ icdirty1: /* primary cache line size is 16 bytes */
1993/0918		dcflush1: /* primary cache line size is 16 bytes */
1993/0907		CACHE PI+HI, 0x00(R8) CACHE PI+HI, 0x10(R8) CACHE PI+HI, 0x20(R8) CACHE PI+HI, 0x30(R8)
1993/0918		CACHE PD+HWB, 0x00(R8) CACHE PD+HWB, 0x10(R8) CACHE PD+HWB, 0x20(R8) CACHE PD+HWB, 0x30(R8)
1993/0907		SUB $0x40, R9 ADD $0x40, R8 BGTZ R9, icdirty1
1993/0918		BGTZ R9, dcflush1
1993/0903		MOVW R10, M(STATUS)
1993/0907		WAIT WAIT
1993/0903		WAIT RET
1993/0918/sys/src/9/carrera/l.s:212,218 – 1993/1208/sys/src/9/carrera/l.s:212,218 (short | long)
1993/0903		WAIT RET TEXT puttlbx(SB), $0
1993/1208		TEXT puttlbxx(SB), $0
1993/0903		MOVW 4(FP), R2 MOVW 8(FP), R3
1993/1208/sys/src/9/carrera/l.s:310,315 – 1993/1209/sys/src/9/carrera/l.s:310,327 (short | long)
1993/0903		TEXT utlbmiss(SB), $-4
1993/1209		CONST ((0xA0090000), R27) MOVW M(EPC), R26 MOVW R26, 0(R27) MOVW M(BADVADDR), R26 MOVW R26, 4(R27) MOVW M(CAUSE), R26 MOVW R26, 8(R27) MOVW M(TLBVIRT), R26 MOVW R26, 12(R27) MOVW M(17), R26 MOVW R26, 16(R27)
1993/0903		MOVW M(TLBVIRT), R27 WAIT MOVW R27, R26
1993/1209/sys/src/9/carrera/l.s:212,218 – 1993/1210/sys/src/9/carrera/l.s:212,218 (short | long)
1993/0903		WAIT RET
1993/1208		TEXT puttlbxx(SB), $0
1993/1210		TEXT puttlbx(SB), $0
1993/0903		MOVW 4(FP), R2 MOVW 8(FP), R3
1993/1209/sys/src/9/carrera/l.s:750,755 – 1993/1210/sys/src/9/carrera/l.s:750,758
1993/0903		* we avoid using R4, R5, R6, and R7 so gotopc can call us without saving them */ TEXT icflush(SB), $-4 /* icflush(virtaddr, count) */
1993/1210		MOVW $0xA0090008, R10 MOVW $2001, R9 MOVW R9, (R10)
1993/0903		MOVW M(STATUS), R10 WAIT MOVW 4(FP), R9
1993/1209/sys/src/9/carrera/l.s:779,784 – 1993/1210/sys/src/9/carrera/l.s:782,790
1993/0903		WAIT
1993/0907		WAIT WAIT
1993/1210		MOVW $0xA0090008, R10 MOVW $2002, R9 MOVW R9, (R10)
1993/0903		RET
1993/0918		TEXT dcflush(SB), $-4 /* dcflush(virtaddr, count) */
1993/1210/sys/src/9/carrera/l.s:12,17 – 1993/1211/sys/src/9/carrera/l.s:12,19 (short | long)
1993/0903		#define CONST(x,r) MOVW $((x)&0xffff0000), r; OR $((x)&0xffff), r
1993/1211		#define RDBGSV CONST(0x80020000, R26); MOVW R29, 0(R26); MOVW M(EPC), R27; MOVW R27, 4(R26); MOVW R31, 8(R26)
1993/0903		/* * R4000 instructions */
1993/1210/sys/src/9/carrera/l.s:305,327 – 1993/1211/sys/src/9/carrera/l.s:307,322
1993/0903		NOOP4 NOOP4
1993/1211		RDBGSV
1993/0903		MOVW $utlbmiss(SB), R26 JMP (R26) TEXT utlbmiss(SB), $-4
1993/1211		CONST (MACHADDR, R26) /* R26 = m-> */ MOVW 16(R26), R27 ADDU $1, R27 MOVW R27, 16(R26) /* m->tlbfault++ */
1993/0903
1993/1209		CONST ((0xA0090000), R27) MOVW M(EPC), R26 MOVW R26, 0(R27) MOVW M(BADVADDR), R26 MOVW R26, 4(R27) MOVW M(CAUSE), R26 MOVW R26, 8(R27) MOVW M(TLBVIRT), R26 MOVW R26, 12(R27) MOVW M(17), R26 MOVW R26, 16(R27)
1993/0903		MOVW M(TLBVIRT), R27 WAIT MOVW R27, R26
1993/1210/sys/src/9/carrera/l.s:392,397 – 1993/1211/sys/src/9/carrera/l.s:387,393
1993/0903		NOOP4 NOOP4
1993/1211		RDBGSV
1993/0903		MOVW $exception(SB), R26 JMP (R26)
1993/1210/sys/src/9/carrera/l.s:399,404 – 1993/1211/sys/src/9/carrera/l.s:395,401
1993/0903		NOOP4 NOOP4
1993/1211		RDBGSV
1993/0903		MOVW $exception(SB), R26 JMP (R26) NOP
1993/1210/sys/src/9/carrera/l.s:750,758 – 1993/1211/sys/src/9/carrera/l.s:747,752
1993/0903		* we avoid using R4, R5, R6, and R7 so gotopc can call us without saving them */ TEXT icflush(SB), $-4 /* icflush(virtaddr, count) */
1993/1210		MOVW $0xA0090008, R10 MOVW $2001, R9 MOVW R9, (R10)
1993/0903		MOVW M(STATUS), R10 WAIT MOVW 4(FP), R9
1993/1210/sys/src/9/carrera/l.s:782,790 – 1993/1211/sys/src/9/carrera/l.s:776,781
1993/0903		WAIT
1993/0907		WAIT WAIT
1993/1210		MOVW $0xA0090008, R10 MOVW $2002, R9 MOVW R9, (R10)
1993/0903		RET
1993/0918		TEXT dcflush(SB), $-4 /* dcflush(virtaddr, count) */
1993/1210/sys/src/9/carrera/l.s:805,814 – 1993/1211/sys/src/9/carrera/l.s:796,805
1993/0907		CACHE PI+HI, 0x10(R8) CACHE PI+HI, 0x20(R8) CACHE PI+HI, 0x30(R8)
1993/0918		CACHE PD+HWB, 0x00(R8) CACHE PD+HWB, 0x10(R8) CACHE PD+HWB, 0x20(R8) CACHE PD+HWB, 0x30(R8)
1993/1211		CACHE PD+HWBI, 0x00(R8) CACHE PD+HWBI, 0x10(R8) CACHE PD+HWBI, 0x20(R8) CACHE PD+HWBI, 0x30(R8)
1993/0907		SUB $0x40, R9 ADD $0x40, R8
1993/0918		BGTZ R9, dcflush1
1993/1211/sys/src/9/carrera/l.s:432,462 – 1993/1212/sys/src/9/carrera/l.s:432,437 (short | long)
1993/0903		BNE R26, notsys JAL syscall(SB) MOVW R0, R2 MOVW R0, R3 MOVW R0, R4 MOVW R0, R5 MOVW R0, R6 MOVW R0, R7 MOVW R0, R8 MOVW R0, R9 MOVW R0, R10 MOVW R0, R11 MOVW R0, R12 MOVW R0, R13 MOVW R0, R14 MOVW R0, R15 MOVW R0, R16 MOVW R0, R17 MOVW R0, R18 MOVW R0, R19 MOVW R0, R20 MOVW R0, R21 MOVW R0, R22 MOVW R0, R23 MOVW R0, R24 MOVW R0, R25 MOVW R0, R27 sysrestore: MOVW 0x28(SP), R31
1993/1212/sys/src/9/carrera/l.s:12,18 – 1993/1217/sys/src/9/carrera/l.s:12,28 (short | long)
1993/0903		#define CONST(x,r) MOVW $((x)&0xffff0000), r; OR $((x)&0xffff), r
1993/1211		#define RDBGSV CONST(0x80020000, R26); MOVW R29, 0(R26); MOVW M(EPC), R27; MOVW R27, 4(R26); MOVW R31, 8(R26)
1993/1217		#define RDBGSV CONST(0x80020000, R26); \ MOVW R29, 0(R26); \ MOVW M(EPC), R27; \ MOVW R27, 4(R26); \ MOVW R31, 8(R26); \ MOVW M(CAUSE), R27; \ MOVW R27, 12(R26); \ MOVW M(STATUS), R27; \ MOVW R27, 16(R26); \ MOVW M(BADVADDR), R27; \ MOVW R27, 20(R26)
1993/1211
1993/0903		/* * R4000 instructions
1993/1217/sys/src/9/carrera/l.s:22,28 – 1993/1220/sys/src/9/carrera/l.s:22,28 (short | long)
1993/1217		MOVW M(STATUS), R27; \ MOVW R27, 16(R26); \ MOVW M(BADVADDR), R27; \ MOVW R27, 20(R26)
1993/1220		MOVW R27, 20(R26);
1993/1211
1993/0903		/* * R4000 instructions
1993/1220/sys/src/9/carrera/l.s:742,750 – 1993/1231/sys/src/9/carrera/l.s:742,750 (short | long)
1993/0904		ADDU R1, R9 /* R9 = last address */ MOVW $(~0x3f), R8 AND R1, R8 /* R8 = first address, rounded down */ ADD $0x3f, R9
1993/1231		ADDU $0x3f, R9
1993/0904		AND $(~0x3f), R9 /* round last address up */ SUB R8, R9 /* R9 = revised count */
1993/1231		SUBU R8, R9 /* R9 = revised count */
1993/0903		icflush1: /* primary cache line size is 16 bytes */
1993/0904		CACHE PD+HWB, 0x00(R8) CACHE PI+HI, 0x00(R8)
1993/1220/sys/src/9/carrera/l.s:754,761 – 1993/1231/sys/src/9/carrera/l.s:754,761
1993/0904		CACHE PI+HI, 0x20(R8) CACHE PD+HWB, 0x30(R8) CACHE PI+HI, 0x30(R8) SUB $0x40, R9 ADD $0x40, R8
1993/1231		SUBU $0x40, R9 ADDU $0x40, R8
1993/0903		BGTZ R9, icflush1 MOVW R10, M(STATUS) WAIT
1993/1220/sys/src/9/carrera/l.s:773,781 – 1993/1231/sys/src/9/carrera/l.s:773,781
1993/0907		ADDU R1, R9 /* R9 = last address */ MOVW $(~0x3f), R8 AND R1, R8 /* R8 = first address, rounded down */ ADD $0x3f, R9
1993/1231		ADDU $0x3f, R9
1993/0907		AND $(~0x3f), R9 /* round last address up */ SUB R8, R9 /* R9 = revised count */
1993/1231		SUBU R8, R9 /* R9 = revised count */
1993/0918		dcflush1: /* primary cache line size is 16 bytes */
1993/0907		CACHE PI+HI, 0x00(R8) CACHE PI+HI, 0x10(R8)
1993/1220/sys/src/9/carrera/l.s:785,792 – 1993/1231/sys/src/9/carrera/l.s:785,792
1993/1211		CACHE PD+HWBI, 0x10(R8) CACHE PD+HWBI, 0x20(R8) CACHE PD+HWBI, 0x30(R8)
1993/0907		SUB $0x40, R9 ADD $0x40, R8
1993/1231		SUBU $0x40, R9 ADDU $0x40, R8
1993/0918		BGTZ R9, dcflush1
1993/0903		MOVW R10, M(STATUS) WAIT
1993/1231/sys/src/9/carrera/l.s:28,34 – 1994/0207/sys/src/9/carrera/l.s:28,34 (short | long)
1993/0903		* R4000 instructions */ #define LD(base, rt) WORD $((067<<26)|((base)<<21)|((rt)<<16)) #define STD(rt, base) WORD $((077<<26)|((base)<<21)|((rt)<<16))
1994/0207		#define STD(rt, base) WORD $((077<<26)|((base)<<21)|((rt)<<16))
1993/0903		#define DSLL(sa, rt, rd) WORD $(((rt)<<16)|((rd)<<11)|((sa)<<6)|070) #define DSRA(sa, rt, rd) WORD $(((rt)<<16)|((rd)<<11)|((sa)<<6)|073) #define LL(base, rt) WORD $((060<<26)|((base)<<21)|((rt)<<16))
1993/1231/sys/src/9/carrera/l.s:841,847 – 1994/0207/sys/src/9/carrera/l.s:841,847
1993/0903		MOVW 4(FP), R3 BNE R2, uvgetuna /* alligned load */
1994/0207		/* aligned load */
1993/0903		LD (1,2) WAIT MOVW R2, R1
1993/1231/sys/src/9/carrera/l.s:853,864 – 1994/0207/sys/src/9/carrera/l.s:853,864
1993/0903		AND $7, R3, R4 BNE R4, uvputuna /* alligned store */
1994/0207		/* aligned store */
1993/0903		STD (2,3) NOP RET /* unalligned load */
1994/0207		/* unaligned load */
1993/0903		uvgetuna: MOVW 0(R1),R2 MOVW 4(R1),R1
1994/0207/sys/src/9/carrera/l.s:1,10 – 1994/0209/sys/src/9/carrera/l.s:1,10 (short | long)
1993/0903		#include "mem.h" #define SP R29
1994/0209		#define SP R29
1993/0903		#define PROM (KSEG1+0x1C000000)
1994/0209		#define PROM (KSEG1+0x1C000000)
1993/0903		#define NOOP WORD $0x27 #define FCRNOOP NOOP; NOOP; NOOP
1994/0209		#define FCRNOOP NOOP; NOOP; NOOP
1993/0903		#define WAIT NOOP; NOOP #define NOOP4 NOOP; NOOP; NOOP; NOOP
1994/0207/sys/src/9/carrera/l.s:27,34 – 1994/0209/sys/src/9/carrera/l.s:27,34
1993/0903		/* * R4000 instructions */ #define LD(base, rt) WORD $((067<<26)|((base)<<21)|((rt)<<16))
1994/0207		#define STD(rt, base) WORD $((077<<26)|((base)<<21)|((rt)<<16))
1994/0209		#define LD(offset, base, rt) WORD $((067<<26)|((base)<<21)|((rt)<<16)|((offset)&0xFFFF)) #define STD(rt, offset, base) WORD $((077<<26)|((base)<<21)|((rt)<<16)|((offset)&0xFFFF))
1993/0903		#define DSLL(sa, rt, rd) WORD $(((rt)<<16)|((rd)<<11)|((sa)<<6)|070) #define DSRA(sa, rt, rd) WORD $(((rt)<<16)|((rd)<<11)|((sa)<<6)|073) #define LL(base, rt) WORD $((060<<26)|((base)<<21)|((rt)<<16))
1994/0207/sys/src/9/carrera/l.s:491,496 – 1994/0209/sys/src/9/carrera/l.s:491,502
1993/0903		TEXT saveregs(SB), $-4 MOVW R1, 0x9C(SP) MOVW R2, 0x98(SP)
1994/0209		/* save R5, R6 as 64 bits */ ADDU $(UREGSIZE-16), SP, R1 MOVW $~7, R2 /* don't let him use R28 */ AND R2, R1 STD (5, 0,(1)) STD (6, 8,(1))
1993/0903		ADDU $8, SP, R1 MOVW R1, 0x04(SP) /* arg to base of regs */ MOVW M(STATUS), R1
1994/0207/sys/src/9/carrera/l.s:567,574 – 1994/0209/sys/src/9/carrera/l.s:573,583
1993/0903		MOVW 0x7C(SP), R9 MOVW 0x80(SP), R8 MOVW 0x84(SP), R7 MOVW 0x88(SP), R6 MOVW 0x8C(SP), R5
1994/0209		/* * restored below * MOVW 0x88(SP), R6 * MOVW 0x8C(SP), R5 */
1993/0903		MOVW 0x90(SP), R4 MOVW 0x94(SP), R3 MOVW 0x24(SP), R2
1994/0207/sys/src/9/carrera/l.s:575,580 – 1994/0209/sys/src/9/carrera/l.s:584,595
1993/0903		MOVW 0x20(SP), R1 MOVW R2, LO MOVW R1, HI
1994/0209		/* restore 64-bit R5, R6 */ ADDU $(UREGSIZE-16), SP, R1 MOVW $~7, R2 /* don't let him use R28 */ AND R2, R1 LD (0,(1), 5) LD (8,(1), 6)
1993/0903		MOVW 0x08(SP), R1 MOVW 0x98(SP), R2 MOVW R1, M(STATUS)
1994/0207/sys/src/9/carrera/l.s:842,848 – 1994/0209/sys/src/9/carrera/l.s:857,863
1993/0903		BNE R2, uvgetuna
1994/0207		/* aligned load */
1993/0903		LD (1,2)
1994/0209		LD (0,(1), 2)
1993/0903		WAIT MOVW R2, R1 DSLL (16,1,1)
1994/0207/sys/src/9/carrera/l.s:854,860 – 1994/0209/sys/src/9/carrera/l.s:869,875
1993/0903		BNE R4, uvputuna
1994/0207		/* aligned store */
1993/0903		STD (2,3)
1994/0209		STD (2, 0,(3))
1993/0903		NOP RET
1994/0209/sys/src/9/carrera/l.s:27,34 – 1994/0228/sys/src/9/carrera/l.s:27,34 (short | long)
1993/0903		/* * R4000 instructions */
1994/0209		#define LD(offset, base, rt) WORD $((067<<26)|((base)<<21)|((rt)<<16)|((offset)&0xFFFF)) #define STD(rt, offset, base) WORD $((077<<26)|((base)<<21)|((rt)<<16)|((offset)&0xFFFF))
1994/0228		#define LD(offset, base, rt) WORD $((067<<26)|((base)<<21)|((rt)<<16)|((offset)&0xFFFF)) #define STD(rt, offset, base) WORD $((077<<26)|((base)<<21)|((rt)<<16)|((offset)&0xFFFF))
1993/0903		#define DSLL(sa, rt, rd) WORD $(((rt)<<16)|((rd)<<11)|((sa)<<6)|070) #define DSRA(sa, rt, rd) WORD $(((rt)<<16)|((rd)<<11)|((sa)<<6)|073) #define LL(base, rt) WORD $((060<<26)|((base)<<21)|((rt)<<16))
1994/0209/sys/src/9/carrera/l.s:91,97 – 1994/0228/sys/src/9/carrera/l.s:91,96
1993/0903		* Take first processor into user mode * - argument is stack pointer to user */                  TEXT touser(SB), $-4 MOVW $(UTZERO+32), R2 /* header appears in text */
1994/0209/sys/src/9/carrera/l.s:108,120 – 1994/0228/sys/src/9/carrera/l.s:107,117
1993/0903		ERET TEXT firmware(SB), $0                  SLL $3, R1 MOVW $(PROM+0x774), R1 JMP (R1) TEXT splhi(SB), $0                  MOVW R31, 12(R(MACH)) /* save PC in m->splpc */ MOVW M(STATUS), R1 WAIT
1994/0209/sys/src/9/carrera/l.s:124,130 – 1994/0228/sys/src/9/carrera/l.s:121,126
1993/0903		RET TEXT splx(SB), $0                  MOVW R31, 12(R(MACH)) /* save PC in m->splpc */ MOVW M(STATUS), R2 WAIT
1994/0209/sys/src/9/carrera/l.s:136,142 – 1994/0228/sys/src/9/carrera/l.s:132,137
1993/0903		RET TEXT spllo(SB), $0                  MOVW M(STATUS), R1 WAIT OR $IE, R1, R2
1994/0209/sys/src/9/carrera/l.s:144,165 – 1994/0228/sys/src/9/carrera/l.s:139,151
1993/0903		WAIT RET TEXT machstatus(SB), $0                  MOVW M(STATUS), R1 WAIT RET                  TEXT spldone(SB), $0                  RET TEXT wbflush(SB), $-4                  RET TEXT setlabel(SB), $-4                  MOVW R29, 0(R1) MOVW R31, 4(R1) MOVW $0, R1
1994/0209/sys/src/9/carrera/l.s:166,172 – 1994/0228/sys/src/9/carrera/l.s:152,157
1993/0903		RET TEXT gotolabel(SB), $-4                  MOVW 0(R1), R29 MOVW 4(R1), R31 MOVW $1, R1
1994/0209/sys/src/9/carrera/l.s:173,179 – 1994/0228/sys/src/9/carrera/l.s:158,163
1993/0903		RET TEXT gotopc(SB), $8                  MOVW R1, 0(FP) /* save arguments for later */ MOVW $(64*1024), R7 MOVW R7, 8(SP)
1994/0209/sys/src/9/carrera/l.s:186,192 – 1994/0228/sys/src/9/carrera/l.s:170,175
1993/0903		JMP (R7) TEXT puttlb(SB), $0                  MOVW R1, M(TLBVIRT) MOVW 4(FP), R2 /* phys0 */ MOVW 8(FP), R3 /* phys1 */
1994/0209/sys/src/9/carrera/l.s:225,231 – 1994/0228/sys/src/9/carrera/l.s:208,213
1993/0903		RET
1993/1210		TEXT puttlbx(SB), $0
1993/0903		MOVW 4(FP), R2 MOVW 8(FP), R3 MOVW 12(FP), R4
1994/0209/sys/src/9/carrera/l.s:245,251 – 1994/0228/sys/src/9/carrera/l.s:227,232
1993/0903		RET TEXT tlbvirt(SB), $0                  NOOP MOVW M(TLBVIRT), R1 NOOP
1994/0209/sys/src/9/carrera/l.s:252,258 – 1994/0228/sys/src/9/carrera/l.s:233,238
1993/0903		RET TEXT gettlbx(SB), $0                  MOVW 4(FP), R5 MOVW M(TLBVIRT), R10 NOOP4
1994/0209/sys/src/9/carrera/l.s:272,278 – 1994/0228/sys/src/9/carrera/l.s:252,257
1993/0903		RET TEXT gettlbp(SB), $0                  MOVW 4(FP), R5 MOVW R1, M(TLBVIRT) NOOP
1994/0209/sys/src/9/carrera/l.s:301,307 – 1994/0228/sys/src/9/carrera/l.s:280,285
1993/0903		RET TEXT gettlbvirt(SB), $0                  MOVW R1, M(INDEX) NOOP NOOP
1994/0209/sys/src/9/carrera/l.s:314,320 – 1994/0228/sys/src/9/carrera/l.s:292,297
1993/0903		RET TEXT vector0(SB), $-4                  NOOP4 NOOP4
1993/1211		RDBGSV
1994/0209/sys/src/9/carrera/l.s:394,400 – 1994/0228/sys/src/9/carrera/l.s:371,376
1993/0903		JMP (R26) TEXT vector100(SB), $-4                  NOOP4 NOOP4
1993/1211		RDBGSV
1994/0209/sys/src/9/carrera/l.s:402,408 – 1994/0228/sys/src/9/carrera/l.s:378,383
1993/0903		JMP (R26) TEXT vector180(SB), $-4                  NOOP4 NOOP4
1993/1211		RDBGSV
1994/0209/sys/src/9/carrera/l.s:415,421 – 1994/0228/sys/src/9/carrera/l.s:390,395
1993/0903		WAIT AND $KUSER, R26 BEQ R26, waskernel                  wasuser: CONST (MACHADDR, R27) /* R27 = m-> */ MOVW 8(R27), R26 /* R26 = m->proc */
1994/0209/sys/src/9/carrera/l.s:660,666 – 1994/0228/sys/src/9/carrera/l.s:634,639
1993/0903		RET TEXT restfpregs(SB), $0                  MOVW M(STATUS), R3 WAIT OR $CU1, R3
1994/0209/sys/src/9/carrera/l.s:693,699 – 1994/0228/sys/src/9/carrera/l.s:666,671
1993/0903		RET TEXT fcr31(SB), $0                  MOVW FCR31, R1 /* 3 delays before using R1 */ MOVW M(STATUS), R3 WAIT
1994/0209/sys/src/9/carrera/l.s:700,714 – 1994/0228/sys/src/9/carrera/l.s:672,679
1993/0903		AND $~CU1, R3 MOVW R3, M(STATUS) WAIT                  RET TEXT prid(SB), $0                  MOVW M(PRID), R1 WAIT RET                  /* * Emulate 68020 test and set: load linked / store conditional */
1994/0209/sys/src/9/carrera/l.s:779,785 – 1994/0228/sys/src/9/carrera/l.s:744,749
1993/0903		RET
1993/0918		TEXT dcflush(SB), $-4 /* dcflush(virtaddr, count) */
1993/0903		MOVW M(STATUS), R10 WAIT MOVW 4(FP), R9
1994/0209/sys/src/9/carrera/l.s:791,797 – 1994/0228/sys/src/9/carrera/l.s:755,761
1993/1231		ADDU $0x3f, R9
1993/0907		AND $(~0x3f), R9 /* round last address up */
1993/1231		SUBU R8, R9 /* R9 = revised count */
1993/0918		dcflush1: /* primary cache line size is 16 bytes */
1994/0228		dcflush1: /* primary cache line is 16 bytes */
1993/0907		CACHE PI+HI, 0x00(R8) CACHE PI+HI, 0x10(R8) CACHE PI+HI, 0x20(R8)
1994/0209/sys/src/9/carrera/l.s:832,861 – 1994/0228/sys/src/9/carrera/l.s:796,813
1993/0903		RET TEXT rdcount(SB), $0                  MOVW M(COUNT), R1 NOOP RET TEXT wrcompare(SB), $0                  MOVW R1, M(COMPARE) RET TEXT busprobe(SB), $-4                  NOOP MOVW (R1), R2 MOVW $0, R1 NOOP RET                  TEXT uvmove(SB), $-4                  AND $7, R1, R2 MOVW 4(FP), R3 BNE R2, uvgetuna
1994/0207		/* aligned load */
1994/0209		LD (0,(1), 2)
1993/0903		WAIT
1994/0209/sys/src/9/carrera/l.s:867,873 – 1994/0228/sys/src/9/carrera/l.s:819,824
1993/0903		uvput: AND $7, R3, R4 BNE R4, uvputuna
1994/0207		/* aligned store */
1994/0209		STD (2, 0,(3))
1993/0903		NOP
1994/0209/sys/src/9/carrera/l.s:888,897 – 1994/0228/sys/src/9/carrera/l.s:839,842
1993/0903		DSRA (16,2,2) MOVW R2, 0(R3) MOVW R1, 4(R3) RET                  TEXT hack(SB), $-4                  MOVW M(CONFIG), R1 NOP RET
1994/0228/sys/src/9/carrera/l.s:840,842 – 1994/0307/sys/src/9/carrera/l.s:840,861 (short | long)
1993/0903		MOVW R2, 0(R3) MOVW R1, 4(R3) RET
1994/0307		TEXT uvld(SB), $-4 /* uvld(address, dst) */ MOVV 0(R1), R5 MOVW 4(FP), R2 MOVW R5, 4(R2) DSRA (16,5,5) DSRA (16,5,5) MOVW R5, 0(R2) RET TEXT uvst(SB), $-4 /* uvst(address, src) */ MOVW 4(FP), R2 MOVW 0(R2), R5 DSLL (16,5,5) DSLL (16,5,5) MOVW 4(R2), R2 OR R2, R5 MOVV R5, 0(R1) RET
1994/0307/sys/src/9/carrera/l.s:842,861 – 1994/0308/sys/src/9/carrera/l.s:842,854 (short | long)
1993/0903		RET
1994/0307		TEXT uvld(SB), $-4 /* uvld(address, dst) */ MOVV 0(R1), R5 MOVW 4(FP), R2 MOVW R5, 4(R2) DSRA (16,5,5) DSRA (16,5,5) MOVW R5, 0(R2)
1994/0308		MOVV 0(R1), R5 MOVV R5, 0(R2)
1994/0307		RET TEXT uvst(SB), $-4 /* uvst(address, src) */ MOVW 4(FP), R2 MOVW 0(R2), R5 DSLL (16,5,5) DSLL (16,5,5) MOVW 4(R2), R2 OR R2, R5
1994/0308		MOVV 0(R2), R5
1994/0307		MOVV R5, 0(R1) RET
1994/0308/sys/src/9/carrera/l.s:791,797 – 1994/0309/sys/src/9/carrera/l.s:791,796 (short | long)
1993/0903		RET TEXT getcallerpc(SB), $0                  MOVW 0(SP), R1 RET
1994/0308/sys/src/9/carrera/l.s:804,846 – 1994/0309/sys/src/9/carrera/l.s:803,808
1993/0903		MOVW R1, M(COMPARE) RET TEXT uvmove(SB), $-4 AND $7, R1, R2 MOVW 4(FP), R3 BNE R2, uvgetuna
1994/0207		/* aligned load */
1994/0209		LD (0,(1), 2)
1993/0903		WAIT MOVW R2, R1 DSLL (16,1,1) DSLL (16,1,1) DSRA (16,1,1) DSRA (16,1,1) uvput: AND $7, R3, R4 BNE R4, uvputuna
1994/0207		/* aligned store */
1994/0209		STD (2, 0,(3))
1993/0903		NOP RET
1994/0207		/* unaligned load */
1993/0903		uvgetuna: MOVW 0(R1),R2 MOVW 4(R1),R1 DSLL (16,2,2) DSLL (16,2,2) OR R1, R2 JMP uvput                  /* unalligned store */ uvputuna: DSRA (16,2,2) DSRA (16,2,2) MOVW R2, 0(R3) MOVW R1, 4(R3) RET
1994/0307		TEXT uvld(SB), $-4 /* uvld(address, dst) */ MOVW 4(FP), R2
1994/0308		MOVV 0(R1), R5
1994/0308/sys/src/9/carrera/l.s:851,854 – 1994/0309/sys/src/9/carrera/l.s:813,835
1994/0307		MOVW 4(FP), R2
1994/0308		MOVV 0(R2), R5
1994/0307		MOVV R5, 0(R1)
1994/0309		RET TEXT fwblock(SB), $-4 /* wblock(void*port, void *block, csum) */ MOVW 4(FP), R2 MOVW 8(FP), R3 MOVW $64, R4 fwloop: MOVV 0(R2), R5 MOVV R5, 0(R1) ADDU R5, R3 SRLV $32, R5 ADDU R5, R3 ADD $8, R2 SUB $1, R4 BNE R4, fwloop MOVW R3, R1
1994/0307		RET
1994/0309/sys/src/9/carrera/l.s:815,821 – 1994/0311/sys/src/9/carrera/l.s:815,821 (short | long)
1994/0307		MOVV R5, 0(R1)
1994/0309		RET TEXT fwblock(SB), $-4 /* wblock(void*port, void *block, csum) */
1994/0311		TEXT fwblock(SB), $-4 /* fwblock(void*port, void *block, csum) */
1994/0309		MOVW 4(FP), R2 MOVW 8(FP), R3
1994/0309/sys/src/9/carrera/l.s:830,835 – 1994/0311/sys/src/9/carrera/l.s:830,854
1994/0309		ADD $8, R2 SUB $1, R4 BNE R4, fwloop
1994/0311		MOVW R3, R1 RET TEXT frblock(SB), $-4 /* frblock(void*port, void *block, csum) */ MOVW 4(FP), R2 MOVW 8(FP), R3 MOVW $64, R4 frloop: MOVV 0(R1), R5 MOVV R5, 0(R2) ADDU R5, R3 SRLV $32, R5 ADDU R5, R3 ADD $8, R2 SUB $1, R4 BNE R4, frloop
1994/0309		MOVW R3, R1
1994/0307		RET
1994/0311/sys/src/9/carrera/l.s:823,831 – 1994/0312/sys/src/9/carrera/l.s:823,831 (short | long)
1994/0309		fwloop: MOVV 0(R2), R5 MOVV R5, 0(R1) ADDU R5, R3
1994/0312		XOR R5, R3
1994/0309		SRLV $32, R5 ADDU R5, R3
1994/0312		XOR R5, R3
1994/0309		ADD $8, R2 SUB $1, R4
1994/0311/sys/src/9/carrera/l.s:842,850 – 1994/0312/sys/src/9/carrera/l.s:842,850
1994/0311		frloop: MOVV 0(R1), R5 MOVV R5, 0(R2) ADDU R5, R3
1994/0312		XOR R5, R3
1994/0311		SRLV $32, R5 ADDU R5, R3
1994/0312		XOR R5, R3
1994/0311		ADD $8, R2 SUB $1, R4
1994/0312/sys/src/9/carrera/l.s:8,14 – 1994/0322/sys/src/9/carrera/l.s:8,14 (short | long)
1993/0903		#define WAIT NOOP; NOOP #define NOOP4 NOOP; NOOP; NOOP; NOOP #define ERET NOOP4;NOOP4;WORD $0x42000018;NOOP4;NOOP4
1994/0322		#define ERET NOOP4;NOOP4;NOOP4;WORD $0x42000018;NOOP4;NOOP4;NOOP4
1993/0903		#define CONST(x,r) MOVW $((x)&0xffff0000), r; OR $((x)&0xffff), r
1994/0312/sys/src/9/carrera/l.s:103,109 – 1994/0322/sys/src/9/carrera/l.s:103,108
1993/0903		WAIT MOVW R1, SP MOVW R2, M(EPC) NOOP4 ERET TEXT firmware(SB), $0
1994/0312/sys/src/9/carrera/l.s:358,369 – 1994/0322/sys/src/9/carrera/l.s:357,366
1993/0903		NOOP4 BGEZ R26, utlindex TLBWR NOOP4 ERET utlindex: MOVW R0,(R0) TLBWI NOOP4 ERET stlbm:
1994/0312/sys/src/9/carrera/l.s:426,437 – 1994/0322/sys/src/9/carrera/l.s:423,433
1993/0903		MOVW 0x0C(SP), R26 /* old pc */ MOVW 0x10(SP), SP MOVW R26, M(EPC) NOOP4 ERET notsys: JAL trap(SB)
1994/0322		RDBGSV
1993/0903		restore: JAL restregs(SB) MOVW 0x28(SP), R31
1994/0312/sys/src/9/carrera/l.s:440,446 – 1994/0322/sys/src/9/carrera/l.s:436,441
1993/0903		MOVW 0x40(SP), R(USER) MOVW 0x10(SP), SP MOVW R26, M(EPC) NOOP4 ERET waskernel:
1994/0312/sys/src/9/carrera/l.s:455,461 – 1994/0322/sys/src/9/carrera/l.s:450,455
1993/0903		MOVW 0x28(SP), R31 ADDU $UREGSIZE, SP MOVW R26, M(EPC) NOOP4 ERET TEXT forkret(SB), $0
1994/0322/sys/src/9/carrera/l.s:782,787 – 1994/0330/sys/src/9/carrera/l.s:782,790 (short | long)
1993/0903		BGTZ R9, ccache MOVW R10, M(STATUS) WAIT
1994/0330		MOVW M(CONFIG), R1 OR $((1<<4)|(1<<5)), R1 MOVW R1, M(CONFIG)
1993/0903		RET TEXT getcallerpc(SB), $0
1994/0330/sys/src/9/carrera/l.s:837,842 – 1994/0417/sys/src/9/carrera/l.s:837,847 (short | long)
1994/0311		MOVW $64, R4 frloop:
1994/0417		MOVW $50, R10 xx: SUB $1, R10 BNE R10, xx
1994/0311		MOVV 0(R1), R5 MOVV R5, 0(R2)
1994/0312		XOR R5, R3
1994/0417/sys/src/9/carrera/l.s:814,856 – 1994/0418/sys/src/9/carrera/l.s:814,856 (short | long)
1994/0309
1994/0311		TEXT fwblock(SB), $-4 /* fwblock(void*port, void *block, csum) */
1994/0309		MOVW 4(FP), R2 MOVW 8(FP), R3
1994/0418		MOVW 8(FP), R6
1994/0309		MOVW $64, R4 fwloop: MOVV 0(R2), R5 MOVV R5, 0(R1)
1994/0312		XOR R5, R3
1994/0309		SRLV $32, R5
1994/0312		XOR R5, R3
1994/0418		XOR R5, R6 MOVV 8(R2), R5 MOVV R5, 0(R1) XOR R5, R6
1994/0309		ADD $8, R2 SUB $1, R4
1994/0418		ADD $16, R2 SUB $2, R4
1994/0309		BNE R4, fwloop
1994/0311		MOVW R3, R1
1994/0418		MOVW R6, R1 SRLV $32, R6 XOR R6, R1
1994/0311		RET TEXT frblock(SB), $-4 /* frblock(void*port, void *block, csum) */ MOVW 4(FP), R2 MOVW 8(FP), R3
1994/0418		MOVW 8(FP), R6
1994/0311		MOVW $64, R4 frloop:
1994/0417		MOVW $50, R10 xx: SUB $1, R10 BNE R10, xx
1994/0311		MOVV 0(R1), R5 MOVV R5, 0(R2)
1994/0312		XOR R5, R3
1994/0311		SRLV $32, R5
1994/0312		XOR R5, R3
1994/0311		ADD $8, R2 SUB $1, R4
1994/0418		XOR R5, R6 MOVV 0(R1), R5 MOVV R5, 8(R2) XOR R5, R6 ADD $16, R2 SUB $2, R4
1994/0311		BNE R4, frloop
1994/0309		MOVW R3, R1
1994/0418		MOVW R6, R1 SRLV $32, R6 XOR R6, R1
1994/0307		RET
1994/0418/sys/src/9/carrera/l.s:816,822 – 1994/0420/sys/src/9/carrera/l.s:816,822 (short | long)
1994/0309		MOVW 4(FP), R2
1994/0418		MOVW 8(FP), R6
1994/0309		MOVW $64, R4
1994/0420		MOVW $32, R4
1994/0309		fwloop: MOVV 0(R2), R5 MOVV R5, 0(R1)
1994/0418/sys/src/9/carrera/l.s:826,832 – 1994/0420/sys/src/9/carrera/l.s:826,832
1994/0418		XOR R5, R6
1994/0309
1994/0418		ADD $16, R2 SUB $2, R4
1994/0420		SUB $1, R4
1994/0309		BNE R4, fwloop
1994/0311
1994/0418		MOVW R6, R1
1994/0418/sys/src/9/carrera/l.s:838,844 – 1994/0420/sys/src/9/carrera/l.s:838,844
1994/0311		MOVW 4(FP), R2
1994/0418		MOVW 8(FP), R6
1994/0311		MOVW $64, R4
1994/0420		MOVW $32, R4
1994/0311		frloop: MOVV 0(R1), R5 MOVV R5, 0(R2)
1994/0418/sys/src/9/carrera/l.s:847,853 – 1994/0420/sys/src/9/carrera/l.s:847,853
1994/0418		MOVV R5, 8(R2) XOR R5, R6 ADD $16, R2 SUB $2, R4
1994/0420		SUB $1, R4
1994/0311		BNE R4, frloop
1994/0309
1994/0418		MOVW R6, R1
1994/0420/sys/src/9/carrera/l.s:7,29 – 1994/0504/sys/src/9/carrera/l.s:7,15 (short | long)
1994/0209		#define FCRNOOP NOOP; NOOP; NOOP
1993/0903		#define WAIT NOOP; NOOP #define NOOP4 NOOP; NOOP; NOOP; NOOP
1994/0322		#define ERET NOOP4;NOOP4;NOOP4;WORD $0x42000018;NOOP4;NOOP4;NOOP4
1993/0903		#define CONST(x,r) MOVW $((x)&0xffff0000), r; OR $((x)&0xffff), r
1993/1217		#define RDBGSV CONST(0x80020000, R26); \ MOVW R29, 0(R26); \ MOVW M(EPC), R27; \ MOVW R27, 4(R26); \ MOVW R31, 8(R26); \ MOVW M(CAUSE), R27; \ MOVW R27, 12(R26); \ MOVW M(STATUS), R27; \ MOVW R27, 16(R26); \ MOVW M(BADVADDR), R27; \
1993/1220		MOVW R27, 20(R26);
1993/1211
1993/0903		/* * R4000 instructions */
1994/0420/sys/src/9/carrera/l.s:293,299 – 1994/0504/sys/src/9/carrera/l.s:279,284
1993/0903		TEXT vector0(SB), $-4 NOOP4 NOOP4
1993/1211		RDBGSV
1993/0903		MOVW $utlbmiss(SB), R26 JMP (R26)
1994/0420/sys/src/9/carrera/l.s:370,376 – 1994/0504/sys/src/9/carrera/l.s:355,360
1993/0903		TEXT vector100(SB), $-4 NOOP4 NOOP4
1993/1211		RDBGSV
1993/0903		MOVW $exception(SB), R26 JMP (R26)
1994/0420/sys/src/9/carrera/l.s:377,383 – 1994/0504/sys/src/9/carrera/l.s:361,366
1993/0903		TEXT vector180(SB), $-4 NOOP4 NOOP4
1993/1211		RDBGSV
1993/0903		MOVW $exception(SB), R26 JMP (R26) NOP
1994/0420/sys/src/9/carrera/l.s:427,433 – 1994/0504/sys/src/9/carrera/l.s:410,415
1993/0903		notsys: JAL trap(SB)
1994/0322		RDBGSV
1993/0903		restore: JAL restregs(SB) MOVW 0x28(SP), R31
Too many diffs (26 > 25). Stopping.