plan 9 kernel history: overview | file list | diff list

1995/0214/pc/dma.c (diff list | history)

1991/0803/sys/src/9/pc/dma.c:106,112 – 1991/0925/sys/src/9/pc/dma.c:106,113 (short | long)
1991/0803    
	 */ 
	pa = ((ulong)va) & ~KZERO; 
	if(!isphys(va) || (pa&0xFFFF0000)!=((pa+len)&0xFFFF0000)){ 
		xp->pg = newpage(1, 0, 0);
1991/0925    
		if(xp->pg == 0) 
			xp->pg = newpage(1, 0, 0);
1991/0803    
		if(len > BY2PG) 
			len = BY2PG; 
		if(!isread)
1991/0803/sys/src/9/pc/dma.c:115,121 – 1991/0925/sys/src/9/pc/dma.c:116,123
1991/0803    
		xp->len = len; 
		xp->isread = isread; 
		pa = xp->pg->pa; 
	}
1991/0925    
	} else 
		xp->len = 0;
1991/0803    
 
	/* 
	 * this setup must be atomic
1991/0803/sys/src/9/pc/dma.c:161,167 – 1991/0925/sys/src/9/pc/dma.c:163,169
1991/0803    
	unlock(dp); 
 
	xp = &dp->x[chan]; 
	if(xp->pg == 0)
1991/0925    
	if(xp->len == 0)
1991/0803    
		return; 
 
	/*
1991/0803/sys/src/9/pc/dma.c:168,173 – 1991/0925/sys/src/9/pc/dma.c:170,174
1991/0803    
	 *  copy out of temporary page 
	 */ 
	memmove(xp->va, (void*)(KZERO|xp->pg->pa), xp->len); 
	putpage(xp->pg); 
	xp->pg = 0;
1991/0925    
	xp->len = 0;
1991/0803    
}
1991/0925/sys/src/9/pc/dma.c:1,5 – 1992/0321/sys/src/9/pc/dma.c:1,5 (short | long)
1991/0803    
#include	"u.h" 
#include	"lib.h"
1992/0321    
#include	"../port/lib.h"
1991/0803    
#include	"mem.h" 
#include	"dat.h" 
#include	"fns.h"
1992/0321/sys/src/9/pc/dma.c:149,156 – 1992/0711/sys/src/9/pc/dma.c:149,154 (short | long)
1991/0803    
{ 
	DMA *dp; 
	DMAxfer *xp; 
	ulong addr; 
	uchar mode; 
 
	dp = &dma[(chan>>2)&1]; 
	chan = chan & 3;
1992/0711/sys/src/9/pc/dma.c:105,111 – 1992/1013/sys/src/9/pc/dma.c:105,112 (short | long)
1991/0803    
	 *  allocate a page for the DMA. 
	 */ 
	pa = ((ulong)va) & ~KZERO; 
	if(!isphys(va) || (pa&0xFFFF0000)!=((pa+len)&0xFFFF0000)){
1992/1013    
	if((((ulong)va)&0xF0000000) != KZERO 
	|| (pa&0xFFFF0000) != ((pa+len)&0xFFFF0000)){
1991/0925    
		if(xp->pg == 0) 
			xp->pg = newpage(1, 0, 0);
1991/0803    
		if(len > BY2PG)
1992/1013/sys/src/9/pc/dma.c:33,39 – 1993/0915/sys/src/9/pc/dma.c:33,39 (short | long)
1991/0803    
 */ 
struct DMAxfer 
{ 
	Page	*pg;		/* page used by dma */
1993/0915    
	Page	pg;		/* page used by dma */
1991/0803    
	void	*va;		/* virtual address destination/src */ 
	long	len;		/* bytes to be transferred */ 
	int	isread;
1992/1013/sys/src/9/pc/dma.c:79,84 – 1993/0915/sys/src/9/pc/dma.c:79,105
1991/0803    
}; 
 
/*
1993/0915    
 *  DMA must be in the first 16 meg.  This gets called early by main() to 
 *  ensure that. 
 */ 
void 
dmainit(void) 
{ 
	int i, chan; 
	DMA *dp; 
	DMAxfer *xp; 
 
	for(i = 0; i < 2; i++){ 
		dp = &dma[i]; 
		for(chan = 0; chan < 4; chan++){ 
			xp = &dp->x[chan]; 
			xp->pg.pa = (ulong)xspanalloc(BY2PG, BY2PG, 0); 
			xp->pg.va = KZERO|xp->pg.pa; 
		} 
	} 
} 
 
/*
1991/0803    
 *  setup a dma transfer.  if the destination is not in kernel 
 *  memory, allocate a page for the transfer. 
 *
1992/1013/sys/src/9/pc/dma.c:101,122 – 1993/0915/sys/src/9/pc/dma.c:122,142
1991/0803    
	xp = &dp->x[chan]; 
 
	/* 
	 *  if this isn't kernel memory (or crossing 64k boundary), 
	 *  allocate a page for the DMA.
1993/0915    
	 *  if this isn't kernel memory or crossing 64k boundary or above 16 meg 
	 *  use the allocated low memory page.
1991/0803    
	 */ 
	pa = ((ulong)va) & ~KZERO;
1993/0915    
	pa = PADDR(va);
1992/1013    
	if((((ulong)va)&0xF0000000) != KZERO 
	|| (pa&0xFFFF0000) != ((pa+len)&0xFFFF0000)){
1991/0925    
		if(xp->pg == 0) 
			xp->pg = newpage(1, 0, 0);
1993/0915    
	|| (pa&0xFFFF0000) != ((pa+len)&0xFFFF0000) 
	|| pa > 16*MB){
1991/0803    
		if(len > BY2PG) 
			len = BY2PG; 
		if(!isread) 
			memmove((void*)(KZERO|xp->pg->pa), va, len);
1993/0915    
			memmove((void*)(xp->pg.va), va, len);
1991/0803    
		xp->va = va; 
		xp->len = len; 
		xp->isread = isread; 
		pa = xp->pg->pa;
1993/0915    
		pa = xp->pg.pa;
1991/0925    
	} else 
		xp->len = 0;
1991/0803    
1992/1013/sys/src/9/pc/dma.c:168,173 – 1993/0915/sys/src/9/pc/dma.c:188,193
1991/0803    
	/* 
	 *  copy out of temporary page 
	 */ 
	memmove(xp->va, (void*)(KZERO|xp->pg->pa), xp->len);
1993/0915    
	memmove(xp->va, (void*)(xp->pg.va), xp->len);
1991/0925    
	xp->len = 0;
1991/0803    
}
1993/0915/sys/src/9/pc/dma.c:182,188 – 1994/1202/sys/src/9/pc/dma.c:182,188 (short | long)
1991/0803    
	unlock(dp); 
 
	xp = &dp->x[chan];
1991/0925    
	if(xp->len == 0)
1994/1202    
	if(xp->len == 0 || xp->isread)
1991/0803    
		return; 
 
	/*
1994/1202/sys/src/9/pc/dma.c:182,188 – 1994/1206/sys/src/9/pc/dma.c:182,188 (short | long)
1991/0803    
	unlock(dp); 
 
	xp = &dp->x[chan];
1994/1202    
	if(xp->len == 0 || xp->isread)
1994/1206    
	if(xp->len == 0 || !xp->isread)
1991/0803    
		return; 
 
	/*
1994/1206/sys/src/9/pc/dma.c:56,68 – 1995/0214/sys/src/9/pc/dma.c:56,67 (short | long)
1991/0803    
	uchar	mc;		/* master clear */ 
	uchar	cmask;		/* clear mask register */ 
	uchar	wam;		/* write all mask register bit */ 
                 
	Lock; 
}; 
 
struct DMA 
{ 
	DMAport;
1995/0214    
	int	shift;
1991/0803    
	Lock; 
	DMAxfer	x[4]; 
};
1994/1206/sys/src/9/pc/dma.c:71,81 – 1995/0214/sys/src/9/pc/dma.c:70,83
1991/0803    
	{ 0x00, 0x02, 0x04, 0x06, 
	  0x01, 0x03, 0x05, 0x07, 
	  0x87, 0x83, 0x81, 0x82, 
	  0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f }, 
	{ 0xc0, 0xc6, 0xca, 0xce, 
	  0xc4, 0xc8, 0xcc, 0xcf, 
	  0x80, 0x8b, 0x89, 0x8a, 
	  0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc, 0xde },
1995/0214    
	  0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 
	 0 }, 
 
	{ 0xc0, 0xc4, 0xc8, 0xcc, 
	  0xc2, 0xc6, 0xca, 0xce, 
	  0x8f, 0x8b, 0x89, 0x8a, 
	  0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc, 0xde, 
	 1 },
1991/0803    
}; 
 
/*
1994/1206/sys/src/9/pc/dma.c:95,100 – 1995/0214/sys/src/9/pc/dma.c:97,104
1993/0915    
			xp = &dp->x[chan]; 
			xp->pg.pa = (ulong)xspanalloc(BY2PG, BY2PG, 0); 
			xp->pg.va = KZERO|xp->pg.pa;
1995/0214    
			xp->len = 0; 
			xp->isread = 0;
1993/0915    
		} 
	} 
}
1994/1206/sys/src/9/pc/dma.c:143,159 – 1995/0214/sys/src/9/pc/dma.c:147,163
1991/0803    
	/* 
	 * this setup must be atomic 
	 */ 
	lock(dp); 
	outb(dp->cbp, 0);		/* set count & address to their first byte */
1995/0214    
	ilock(dp);
1991/0803    
	mode = (isread ? 0x44 : 0x48) | chan; 
	outb(dp->mode, mode);		/* single mode dma (give CPU a chance at mem) */ 
	outb(dp->addr[chan], pa);		/* set address */ 
	outb(dp->addr[chan], pa>>8); 
	outb(dp->page[chan], pa>>16); 
	outb(dp->count[chan], len-1);		/* set count */ 
	outb(dp->count[chan], (len-1)>>8);
1995/0214    
	outb(dp->cbp, 0);		/* set count & address to their first byte */ 
	outb(dp->addr[chan], pa>>dp->shift);		/* set address */ 
	outb(dp->addr[chan], pa>>(8+dp->shift)); 
	outb(dp->count[chan], (len>>dp->shift)-1);		/* set count */ 
	outb(dp->count[chan], ((len>>dp->shift)-1)>>8);
1991/0803    
	outb(dp->sbm, chan);		/* enable the channel */ 
	unlock(dp);
1995/0214    
	iunlock(dp);
1991/0803    
 
	return len; 
}
1994/1206/sys/src/9/pc/dma.c:177,185 – 1995/0214/sys/src/9/pc/dma.c:181,189
1991/0803    
	/* 
	 *  disable the channel 
	 */ 
	lock(dp);
1995/0214    
	ilock(dp);
1991/0803    
	outb(dp->sbm, 4|chan); 
	unlock(dp);
1995/0214    
	iunlock(dp);
1991/0803    
 
	xp = &dp->x[chan];
1994/1206    
	if(xp->len == 0 || !xp->isread)
1995/0214/sys/src/9/pc/dma.c:162,167 – 1995/0502/sys/src/9/pc/dma.c:162,178 (short | long)
1991/0803    
	return len; 
}
1995/0502    
int 
dmadone(int chan) 
{ 
	DMA *dp; 
 
	dp = &dma[(chan>>2)&1]; 
	chan = chan & 3; 
 
	return inb(dp->cmd) & (1<<chan); 
}
1991/0803    
/* 
 *  this must be called after a dma has been completed. 
 *
1995/0502/sys/src/9/pc/dma.c:206,208 – 1995/0701/sys/src/9/pc/dma.c:206,218 (short | long)
1993/0915    
	memmove(xp->va, (void*)(xp->pg.va), xp->len);
1991/0925    
	xp->len = 0;
1991/0803    
}
1995/0701    
 
void 
dmaemode(int chan, int value) 
{ 
	if(chan < 4) 
		outb(0x40b, value|chan); 
	else 
		outb(0x4d6, value|chan); 
 
}
1995/0701/sys/src/9/pc/dma.c:4,12 – 1996/0607/sys/src/9/pc/dma.c:4,9 (short | long)
1991/0803    
#include	"dat.h" 
#include	"fns.h" 
 
/* 
 *  headland chip set for the safari. 
 */ 
typedef struct DMAport	DMAport; 
typedef struct DMA	DMA; 
typedef struct DMAxfer	DMAxfer;
1995/0701/sys/src/9/pc/dma.c:33,40 – 1996/0607/sys/src/9/pc/dma.c:30,38
1991/0803    
 */ 
struct DMAxfer 
{
1993/0915    
	Page	pg;		/* page used by dma */
1991/0803    
	void	*va;		/* virtual address destination/src */
1996/0607    
	ulong	bpa;		/* bounce buffer physical address */ 
	void*	bva;		/* bounce buffer virtual address */ 
	void*	va;		/* virtual address destination/src */
1991/0803    
	long	len;		/* bytes to be transferred */ 
	int	isread; 
};
1995/0701/sys/src/9/pc/dma.c:95,102 – 1996/0607/sys/src/9/pc/dma.c:93,100
1993/0915    
		dp = &dma[i]; 
		for(chan = 0; chan < 4; chan++){ 
			xp = &dp->x[chan]; 
			xp->pg.pa = (ulong)xspanalloc(BY2PG, BY2PG, 0); 
			xp->pg.va = KZERO|xp->pg.pa;
1996/0607    
			xp->bva = xspanalloc(BY2PG, BY2PG, 0); 
			xp->bpa = PADDR(xp->bva);
1995/0214    
			xp->len = 0; 
			xp->isread = 0;
1993/0915    
		}
1995/0701/sys/src/9/pc/dma.c:117,125 – 1996/0607/sys/src/9/pc/dma.c:115,123
1991/0803    
dmasetup(int chan, void *va, long len, int isread) 
{ 
	DMA *dp; 
	DMAxfer *xp; 
	ulong pa; 
	uchar mode;
1996/0607    
	DMAxfer *xp;
1991/0803    
 
	dp = &dma[(chan>>2)&1]; 
	chan = chan & 3;
1995/0701/sys/src/9/pc/dma.c:132,147 – 1996/0607/sys/src/9/pc/dma.c:130,146
1993/0915    
	pa = PADDR(va);
1992/1013    
	if((((ulong)va)&0xF0000000) != KZERO
1993/0915    
	|| (pa&0xFFFF0000) != ((pa+len)&0xFFFF0000) 
	|| pa > 16*MB){
1996/0607    
	|| pa > 16*MB) {
1991/0803    
		if(len > BY2PG) 
			len = BY2PG; 
		if(!isread)
1993/0915    
			memmove((void*)(xp->pg.va), va, len);
1996/0607    
			memmove(xp->bva, va, len);
1991/0803    
		xp->va = va; 
		xp->len = len; 
		xp->isread = isread;
1993/0915    
		pa = xp->pg.pa;
1991/0925    
	} else
1996/0607    
		pa = xp->bpa; 
	} 
	else
1991/0925    
		xp->len = 0;
1991/0803    
 
	/*
1995/0701/sys/src/9/pc/dma.c:149,155 – 1996/0607/sys/src/9/pc/dma.c:148,154
1991/0803    
	 */
1995/0214    
	ilock(dp);
1991/0803    
	mode = (isread ? 0x44 : 0x48) | chan; 
	outb(dp->mode, mode);		/* single mode dma (give CPU a chance at mem) */
1996/0607    
	outb(dp->mode, mode);	/* single mode dma (give CPU a chance at mem) */
1991/0803    
	outb(dp->page[chan], pa>>16);
1995/0214    
	outb(dp->cbp, 0);		/* set count & address to their first byte */ 
	outb(dp->addr[chan], pa>>dp->shift);		/* set address */
1995/0701/sys/src/9/pc/dma.c:203,218 – 1996/0607/sys/src/9/pc/dma.c:202,207
1991/0803    
	/* 
	 *  copy out of temporary page 
	 */
1993/0915    
	memmove(xp->va, (void*)(xp->pg.va), xp->len);
1996/0607    
	memmove(xp->va, xp->bva, xp->len);
1991/0925    
	xp->len = 0;
1991/0803    
}
1995/0701    
                 
void 
dmaemode(int chan, int value) 
{ 
	if(chan < 4) 
		outb(0x40b, value|chan); 
	else 
		outb(0x4d6, value|chan); 
                 
}
1996/0607/sys/src/9/pc/dma.c:205,207 – 1997/0327/sys/src/9/pc/dma.c:205,220 (short | long)
1996/0607    
	memmove(xp->va, xp->bva, xp->len);
1991/0925    
	xp->len = 0;
1995/0701    
}
1997/0327    
  
int 
dmacount(int chan) 
{ 
	int     retval; 
	DMA     *dp; 
  
	dp = &dma[(chan>>2)&1]; 
	outb(dp->cbp, 0); 
	retval = inb(dp->count[chan]); 
	retval |= inb(dp->count[chan]) << 8; 
	return((retval<<dp->shift)+1); 
}
1997/0327/sys/src/9/pc/dma.c:79,104 – 1997/0404/sys/src/9/pc/dma.c:79,111 (short | long)
1991/0803    
}; 
 
/*
1993/0915    
 *  DMA must be in the first 16 meg.  This gets called early by main() to 
 *  ensure that.
1997/0404    
 *  DMA must be in the first 16MB.  This gets called early by the 
 *  initialisation routines of any devices which require DMA to ensure 
 *  the allocated bounce buffers are below the 16MB limit.
1993/0915    
 */ 
void 
dmainit(void)
1997/0404    
dmainit(int chan)
1993/0915    
{ 
	int i, chan; 
	DMA *dp; 
	DMAxfer *xp;
1997/0404    
	ulong v;
1993/0915    
 
	for(i = 0; i < 2; i++){ 
		dp = &dma[i]; 
		for(chan = 0; chan < 4; chan++){ 
			xp = &dp->x[chan];
1996/0607    
			xp->bva = xspanalloc(BY2PG, BY2PG, 0); 
			xp->bpa = PADDR(xp->bva);
1995/0214    
			xp->len = 0; 
			xp->isread = 0;
1993/0915    
		}
1997/0404    
	dp = &dma[(chan>>2)&1]; 
	chan = chan & 3; 
	xp = &dp->x[chan]; 
	if(xp->bva != nil) 
		return; 
 
	v = (ulong)xalloc(BY2PG+BY2PG); 
	if(v == 0 || PADDR(v) >= 16*MB){ 
		print("dmainit: chan %d: 0x%luX out of range\n", chan, v); 
		xfree((void*)v); 
		v = 0;
1993/0915    
	}
1997/0404    
	xp->bva = (void*)ROUND(v, BY2PG); 
	xp->bpa = PADDR(xp->bva); 
	xp->len = 0; 
	xp->isread = 0;
1993/0915    
} 
 
/*
1997/0327/sys/src/9/pc/dma.c:131,136 – 1997/0404/sys/src/9/pc/dma.c:138,145
1992/1013    
	if((((ulong)va)&0xF0000000) != KZERO
1993/0915    
	|| (pa&0xFFFF0000) != ((pa+len)&0xFFFF0000)
1996/0607    
	|| pa > 16*MB) {
1997/0404    
		if(xp->bva == nil) 
			return -1;
1991/0803    
		if(len > BY2PG) 
			len = BY2PG; 
		if(!isread)
1997/0327/sys/src/9/pc/dma.c:205,211 – 1997/0404/sys/src/9/pc/dma.c:214,221
1996/0607    
	memmove(xp->va, xp->bva, xp->len);
1991/0925    
	xp->len = 0;
1995/0701    
}
1997/0327    
                  
1997/0404    
 
/*
1997/0327    
int 
dmacount(int chan) 
{
1997/0327/sys/src/9/pc/dma.c:218,220 – 1997/0404/sys/src/9/pc/dma.c:228,231
1997/0327    
	retval |= inb(dp->count[chan]) << 8; 
	return((retval<<dp->shift)+1); 
}
1997/0404    
 */
1997/0404/sys/src/9/pc/dma.c:137,143 – 1998/1125/sys/src/9/pc/dma.c:137,143 (short | long)
1993/0915    
	pa = PADDR(va);
1992/1013    
	if((((ulong)va)&0xF0000000) != KZERO
1993/0915    
	|| (pa&0xFFFF0000) != ((pa+len)&0xFFFF0000)
1996/0607    
	|| pa > 16*MB) {
1998/1125    
	|| pa >= 16*MB) {
1997/0404    
		if(xp->bva == nil) 
			return -1;
1991/0803    
		if(len > BY2PG)
1998/1125/sys/src/9/pc/dma.c:32,37 – 1999/0403/sys/src/9/pc/dma.c:32,38 (short | long)
1991/0803    
{
1996/0607    
	ulong	bpa;		/* bounce buffer physical address */ 
	void*	bva;		/* bounce buffer virtual address */
1999/0403    
	int	blen;		/* bounce buffer length */
1996/0607    
	void*	va;		/* virtual address destination/src */
1991/0803    
	long	len;		/* bytes to be transferred */ 
	int	isread;
1998/1125/sys/src/9/pc/dma.c:83,111 – 1999/0403/sys/src/9/pc/dma.c:84,121
1997/0404    
 *  initialisation routines of any devices which require DMA to ensure 
 *  the allocated bounce buffers are below the 16MB limit.
1993/0915    
 */ 
void
1997/0404    
dmainit(int chan)
1999/0403    
int 
dmainit(int chan, int maxtransfer)
1993/0915    
{ 
	DMA *dp; 
	DMAxfer *xp;
1997/0404    
	ulong v;
1993/0915    
1999/0403    
	if(maxtransfer > 64*1024) 
		maxtransfer = 64*1024;
1997/0404    
	dp = &dma[(chan>>2)&1]; 
	chan = chan & 3; 
	xp = &dp->x[chan]; 
	if(xp->bva != nil) 
		return; 
                 
	v = (ulong)xalloc(BY2PG+BY2PG); 
	if(v == 0 || PADDR(v) >= 16*MB){ 
		print("dmainit: chan %d: 0x%luX out of range\n", chan, v); 
		xfree((void*)v); 
		v = 0;
1999/0403    
	if(xp->bva != nil){ 
		if(xp->blen < maxtransfer) 
			return 1; 
		return 0;
1993/0915    
	}
1997/0404    
	xp->bva = (void*)ROUND(v, BY2PG);
1999/0403    
 
	xp->bva = xspanalloc(maxtransfer, BY2PG, 64*1024); 
	if(xp->bva == nil) 
		return 1;
1997/0404    
	xp->bpa = PADDR(xp->bva);
1999/0403    
	if(xp->bpa >= 16*MB){ 
		xfree(xp->bva);		/* doesn't work... */ 
		xp->bva = nil; 
		return 1; 
	} 
	xp->blen = maxtransfer;
1997/0404    
	xp->len = 0; 
	xp->isread = 0;
1999/0403    
 
	return 0;
1993/0915    
} 
 
/*
1998/1125/sys/src/9/pc/dma.c:132,138 – 1999/0403/sys/src/9/pc/dma.c:142,148
1991/0803    
 
	/*
1993/0915    
	 *  if this isn't kernel memory or crossing 64k boundary or above 16 meg 
	 *  use the allocated low memory page.
1999/0403    
	 *  use the bounce buffer.
1991/0803    
	 */
1993/0915    
	pa = PADDR(va);
1992/1013    
	if((((ulong)va)&0xF0000000) != KZERO
1998/1125/sys/src/9/pc/dma.c:140,147 – 1999/0403/sys/src/9/pc/dma.c:150,157
1998/1125    
	|| pa >= 16*MB) {
1997/0404    
		if(xp->bva == nil) 
			return -1;
1991/0803    
		if(len > BY2PG) 
			len = BY2PG;
1999/0403    
		if(len > xp->blen) 
			len = xp->blen;
1991/0803    
		if(!isread)
1996/0607    
			memmove(xp->bva, va, len);
1991/0803    
		xp->va = va;
1999/0403/sys/src/9/pc/dma.c:107,113 – 1999/0422/sys/src/9/pc/dma.c:107,117 (short | long)
1999/0403    
		return 1;
1997/0404    
	xp->bpa = PADDR(xp->bva);
1999/0403    
	if(xp->bpa >= 16*MB){ 
		xfree(xp->bva);		/* doesn't work... */
1999/0422    
		/* 
		 * This will panic with the current 
		 * implementation of xspanalloc(). 
		xfree(xp->bva); 
		 */
1999/0403    
		xp->bva = nil; 
		return 1; 
	}
1999/0422/sys/src/9/pc/dma.c:90,95 – 1999/0713/sys/src/9/pc/dma.c:90,100 (short | long)
1993/0915    
	DMA *dp; 
	DMAxfer *xp;
1999/0713    
	if(ioalloc(0x00, 0x10, 0) < 0 
	|| ioalloc(0x80, 0x10, 0) < 0 
	|| ioalloc(0xd0, 0x10, 0) < 0) 
		panic("dmainit");
1999/0403    
	if(maxtransfer > 64*1024) 
		maxtransfer = 64*1024;
1999/0713/sys/src/9/pc/dma.c:8,30 – 1999/0714/sys/src/9/pc/dma.c:8,13 (short | long)
Use ioalloc.
rsc Fri Mar 4 12:44:25 2005
1991/0803    
typedef struct DMA	DMA; 
typedef struct DMAxfer	DMAxfer; 
 
enum 
{ 
	/* 
	 *  the byte registers for DMA0 are all one byte apart 
	 */ 
	Dma0=		0x00, 
	Dma0status=	Dma0+0x8,	/* status port */ 
	Dma0reset=	Dma0+0xD,	/* reset port */ 
                 
	/* 
	 *  the byte registers for DMA1 are all two bytes apart (why?) 
	 */ 
	Dma1=		0xC0, 
	Dma1status=	Dma1+2*0x8,	/* status port */ 
	Dma1reset=	Dma1+2*0xD,	/* reset port */ 
}; 
                 
/* 
 *  state of a dma transfer 
 */
1999/0713/sys/src/9/pc/dma.c:89,99 – 1999/0714/sys/src/9/pc/dma.c:72,86
1993/0915    
{ 
	DMA *dp; 
	DMAxfer *xp;
1999/0714    
	static int once;
1993/0915    
1999/0713    
	if(ioalloc(0x00, 0x10, 0) < 0 
	|| ioalloc(0x80, 0x10, 0) < 0 
	|| ioalloc(0xd0, 0x10, 0) < 0) 
		panic("dmainit");
1999/0714    
	if(once == 0){ 
		if(ioalloc(0x00, 0x10, 0, "dma") < 0 
		|| ioalloc(0x80, 0x10, 0, "dma") < 0 
		|| ioalloc(0xd0, 0x10, 0, "dma") < 0) 
			panic("dmainit"); 
		once = 1; 
	}
1999/0713    
1999/0403    
	if(maxtransfer > 64*1024) 
		maxtransfer = 64*1024;


source code copyright © 1990-2005 Lucent Technologies; see license
Plan 9 distribution
comments to russ cox (rsc@swtch.com)