plan 9 kernel history: overview | file list | diff list

1998/0710/pc/archgeneric.c (diff list | history)

1992/0923/sys/src/9/pc/archgeneric.c:15,21 – 1992/1013/sys/src/9/pc/archgeneric.c:15,21 (short | long)
change genericreset to i8042reset.
rsc Fri Mar 4 12:44:25 2005
1992/0923    
PCArch generic = 
{ 
	"generic", 
	genericreset,
1992/1013    
	i8042reset,
1992/0923    
	0, 
	0, 
	0,
1992/1013/sys/src/9/pc/archgeneric.c:5,25 – 1997/0327/sys/src/9/pc/archgeneric.c:5,163 (short | long)
add unimplemented for *power. add cpuid detection, archinit.
rsc Fri Mar 4 12:44:25 2005
1992/0923    
#include	"fns.h" 
#include	"io.h"
1997/0327    
static int 
unimplemented(int) 
{ 
	return 0; 
}
1992/0923    
static void 
genericreset(void)
1997/0327    
nop(void)
1992/0923    
{ 
	print("Reset the machine!\n"); 
	for(;;); 
} 
 
PCArch generic =
1997/0327    
void (*coherence)(void) = nop; 
 
PCArch* arch; 
extern PCArch* knownarch[]; 
 
PCArch archgeneric = { 
	"generic",				/* id */ 
	0,					/* ident */ 
	i8042reset,				/* reset */ 
	unimplemented,				/* serialpower */ 
	unimplemented,				/* modempower */ 
 
	i8259init,				/* intrinit */ 
	i8259enable,				/* intrenable */ 
 
	i8253enable,				/* clockenable */ 
}; 
 
typedef struct { 
	int	family; 
	int	model; 
	int	aalcycles; 
	char*	name; 
} X86type; 
 
static X86type x86type[] =
1992/0923    
{ 
	"generic",
1992/1013    
	i8042reset,
1992/0923    
	0, 
	0, 
	0, 
	0, 
	0, 
	0,
1997/0327    
	{ 4,	0,	22,	"486DX", },	/* known chips */ 
	{ 4,	1,	22,	"486DX50", }, 
	{ 4,	2,	22,	"486SX", }, 
	{ 4,	3,	22,	"486DX2", }, 
	{ 4,	4,	22,	"486SL", }, 
	{ 4,	5,	22,	"486SX2", }, 
	{ 4,	7,	22,	"DX2WB", },	/* P24D */ 
	{ 4,	8,	22,	"DX4", }, 
	{ 4,	9,	22,	"DX4WB", }, 
	{ 5,	0,	23,	"P5", }, 
	{ 5,	1,	23,	"P5", }, 
	{ 5,	2,	23,	"P54C", }, 
	{ 5,	3,	23,	"P24T", },	/* PODP5V83 */ 
	{ 5,	4,	23,	"PODP54", }, 
	{ 5,	5,	23,	"PODDX4", }, 
	{ 5,	6,	23,	"PODP5", }, 
	{ 6,	4,	23,	"P55CT", }, 
	{ 6,	1,	16,	"PentiumPro", },/* determined by trial and error */ 
 
	{ 3,	-1,	32,	"386", },	/* family defaults */ 
	{ 4,	-1,	22,	"486", }, 
	{ 5,	-1,	23,	"Pentium", }, 
	{ 6,	-1,	16,	"PentiumPro", }, 
 
	{ -1,	-1,	23,	"unknown", },	/* total default */
1992/0923    
};
1997/0327    
 
void 
cpuidprint(void) 
{ 
	int i; 
	char buf[128]; 
 
	i = sprint(buf, "cpu%d: %dMHz ", m->machno, m->cpumhz); 
	if(m->cpuidid[0]) 
		i += sprint(buf+i, "%s ", m->cpuidid); 
	sprint(buf+i, "%s (cpuid: AX 0x%4.4luX DX 0x%4.4luX)\n", 
		m->cpuidtype, m->cpuidax, m->cpuiddx); 
	print(buf); 
} 
 
int 
cpuidentify(void) 
{ 
	int family, model; 
	X86type *t; 
	ulong cr4, mct[2]; 
 
	cpuid(m->cpuidid, &m->cpuidax, &m->cpuiddx); 
	family = X86FAMILY(m->cpuidax); 
	model = X86MODEL(m->cpuidax); 
	for(t = x86type; t->name; t++){ 
		if((t->family == family && t->model == model) 
		|| (t->family == family && t->model == -1) 
		|| (t->family == -1)) 
			break; 
	} 
	m->cpuidtype = t->name; 
	i8253init(t->aalcycles); 
 
	/* 
	 * If machine check exception or page size extensions are supported 
	 * enable them in CR4 and clear any other set extensions. 
	 * If machine check was enabled clear out any lingering status. 
	 */ 
	if(m->cpuiddx & 0x88){ 
		cr4 = 0; 
		if(m->cpuiddx & 0x08) 
			cr4 |= 0x10;		/* page size extensions */ 
		if(m->cpuiddx & 0x80) 
			cr4 |= 0x40;		/* machine check enable */ 
		putcr4(cr4); 
		if(m->cpuiddx & 0x80) 
			rdmsr(0x01, &mct[1], &mct[0]); 
	} 
 
	return t->family; 
} 
 
void 
archinit(void) 
{ 
	PCArch **p; 
 
	arch = 0; 
	for(p = knownarch; *p; p++){ 
		if((*p)->ident && (*p)->ident() == 0){ 
			arch = *p; 
			break; 
		} 
	} 
	if(arch == 0) 
		arch = &archgeneric; 
	else{ 
		if(arch->id == 0) 
			arch->id = archgeneric.id; 
		if(arch->reset == 0) 
			arch->reset = archgeneric.reset; 
		if(arch->serialpower == 0) 
			arch->serialpower = archgeneric.serialpower; 
		if(arch->modempower == 0) 
			arch->modempower = archgeneric.modempower; 
	 
		if(arch->intrinit == 0) 
			arch->intrinit = archgeneric.intrinit; 
		if(arch->intrenable == 0) 
			arch->intrenable = archgeneric.intrenable; 
	} 
 
	/* 
	 * Decide whether to use copy-on-reference (386 and mp). 
	 */ 
	if(X86FAMILY(m->cpuidax) == 3 || conf.nmach > 1) 
		conf.copymode = 1; 
 
	if(X86FAMILY(m->cpuidax) == 6 /*&& conf.nmach > 1*/) 
		coherence = wbflush; 
}
1997/0327/sys/src/9/pc/archgeneric.c:56,64 – 1997/0404/sys/src/9/pc/archgeneric.c:56,65 (short | long)
rename PODP54 to P54C MMX; add P54C VRT.
rsc Fri Mar 4 12:44:25 2005
1997/0327    
	{ 5,	1,	23,	"P5", }, 
	{ 5,	2,	23,	"P54C", }, 
	{ 5,	3,	23,	"P24T", },	/* PODP5V83 */ 
	{ 5,	4,	23,	"PODP54", },
1997/0404    
	{ 5,	4,	23,	"P54C MMX", },
1997/0327    
	{ 5,	5,	23,	"PODDX4", }, 
	{ 5,	6,	23,	"PODP5", },
1997/0404    
	{ 5,	7,	23,	"P54C VRT", },
1997/0327    
	{ 6,	4,	23,	"P55CT", }, 
	{ 6,	1,	16,	"PentiumPro", },/* determined by trial and error */
1997/0404/sys/src/9/pc/archgeneric.c:50,66 – 1997/0407/sys/src/9/pc/archgeneric.c:50,65 (short | long)
commenting; remove P55CT
rsc Fri Mar 4 12:44:25 2005
1997/0327    
	{ 4,	4,	22,	"486SL", }, 
	{ 4,	5,	22,	"486SX2", }, 
	{ 4,	7,	22,	"DX2WB", },	/* P24D */ 
	{ 4,	8,	22,	"DX4", }, 
	{ 4,	9,	22,	"DX4WB", },
1997/0407    
	{ 4,	8,	22,	"DX4", },	/* P24C */ 
	{ 4,	9,	22,	"DX4WB", },	/* P24CT */
1997/0327    
	{ 5,	0,	23,	"P5", }, 
	{ 5,	1,	23,	"P5", }, 
	{ 5,	2,	23,	"P54C", }, 
	{ 5,	3,	23,	"P24T", },	/* PODP5V83 */
1997/0404    
	{ 5,	4,	23,	"P54C MMX", },
1997/0407    
	{ 5,	3,	23,	"P24T", }, 
	{ 5,	4,	23,	"P55C MMX", },
1997/0327    
	{ 5,	5,	23,	"PODDX4", }, 
	{ 5,	6,	23,	"PODP5", },
1997/0404    
	{ 5,	7,	23,	"P54C VRT", },
1997/0327    
	{ 6,	4,	23,	"P55CT", }, 
	{ 6,	1,	16,	"PentiumPro", },/* determined by trial and error */ 
 
	{ 3,	-1,	32,	"386", },	/* family defaults */
1997/0407/sys/src/9/pc/archgeneric.c:57,64 – 1997/0408/sys/src/9/pc/archgeneric.c:57,62 (short | long)
remove PODDX4, PODP5
rsc Fri Mar 4 12:44:25 2005
1997/0327    
	{ 5,	2,	23,	"P54C", },
1997/0407    
	{ 5,	3,	23,	"P24T", }, 
	{ 5,	4,	23,	"P55C MMX", },
1997/0327    
	{ 5,	5,	23,	"PODDX4", }, 
	{ 5,	6,	23,	"PODP5", },
1997/0404    
	{ 5,	7,	23,	"P54C VRT", },
1997/0327    
	{ 6,	1,	16,	"PentiumPro", },/* determined by trial and error */
1997/0408/sys/src/9/pc/archgeneric.c:59,64 – 1998/0115/sys/src/9/pc/archgeneric.c:59,65 (short | long)
add PentiumII
rsc Fri Mar 4 12:44:25 2005
1997/0407    
	{ 5,	4,	23,	"P55C MMX", },
1997/0404    
	{ 5,	7,	23,	"P54C VRT", },
1997/0327    
	{ 6,	1,	16,	"PentiumPro", },/* determined by trial and error */
1998/0115    
	{ 6,	3,	16,	"PentiumII", },	/* determined by trial and error */
1997/0327    
 
	{ 3,	-1,	32,	"386", },	/* family defaults */ 
	{ 4,	-1,	22,	"486", },
1998/0115/sys/src/9/pc/archgeneric.c:88,94 – 1998/0401/sys/src/9/pc/archgeneric.c:88,95 (short | long)
change MSR 1 mc to vlong
rsc Fri Mar 4 12:44:25 2005
1997/0327    
{ 
	int family, model; 
	X86type *t; 
	ulong cr4, mct[2];
1998/0401    
	ulong cr4; 
	vlong mct;
1997/0327    
 
	cpuid(m->cpuidid, &m->cpuidax, &m->cpuiddx); 
	family = X86FAMILY(m->cpuidax);
1998/0115/sys/src/9/pc/archgeneric.c:115,121 – 1998/0401/sys/src/9/pc/archgeneric.c:116,122
1997/0327    
			cr4 |= 0x40;		/* machine check enable */ 
		putcr4(cr4); 
		if(m->cpuiddx & 0x80) 
			rdmsr(0x01, &mct[1], &mct[0]);
1998/0401    
			rdmsr(0x01, &mct);
1997/0327    
	} 
 
	return t->family;
1998/0401/sys/src/9/pc/archgeneric.c:60,65 – 1998/0404/sys/src/9/pc/archgeneric.c:60,66 (short | long)
add another PentiumII
rsc Fri Mar 4 12:44:25 2005
1997/0404    
	{ 5,	7,	23,	"P54C VRT", },
1997/0327    
	{ 6,	1,	16,	"PentiumPro", },/* determined by trial and error */
1998/0115    
	{ 6,	3,	16,	"PentiumII", },	/* determined by trial and error */
1998/0404    
	{ 6,	5,	16,	"PentiumII", },	/* determined by trial and error */
1997/0327    
 
	{ 3,	-1,	32,	"386", },	/* family defaults */ 
	{ 4,	-1,	22,	"486", },
1998/0404/sys/src/9/pc/archgeneric.c:41,47 – 1998/0522/sys/src/9/pc/archgeneric.c:41,47 (short | long)
change x86type to x86intel; add x86amd
rsc Fri Mar 4 12:44:25 2005
1997/0327    
	char*	name; 
} X86type; 
 
static X86type x86type[] =
1998/0522    
static X86type x86intel[] =
1992/0923    
{
1997/0327    
	{ 4,	0,	22,	"486DX", },	/* known chips */ 
	{ 4,	1,	22,	"486DX50", },
1998/0404/sys/src/9/pc/archgeneric.c:70,75 – 1998/0522/sys/src/9/pc/archgeneric.c:70,102
1997/0327    
	{ -1,	-1,	23,	"unknown", },	/* total default */
1992/0923    
};
1997/0327    
1998/0522    
/* 
 * The AMD processors all implement the CPUID instruction. 
 * The later ones also return the processor name via functions 
 * 0x80000002, 0x80000003 and 0x80000004 in registers AX, BX, CX 
 * and DX: 
 *	K5	"AMD-K5(tm) Processor" 
 *	K6	"AMD-K6tm w/ multimedia extensions" 
 *	K6 3D	"AMD-K6(tm) 3D processor" 
 *	K6 3D+	? 
 */ 
static X86type x86amd[] = 
{ 
	{ 5,	0,	23,	"AMD-K5", },	/* guesswork */ 
	{ 5,	1,	23,	"AMD-K5", },	/* guesswork */ 
	{ 5,	2,	23,	"AMD-K5", },	/* guesswork */ 
	{ 5,	3,	23,	"AMD-K5", },	/* guesswork */ 
	{ 5,	6,	23,	"AMD-K6", },	/* guesswork */ 
	{ 5,	7,	23,	"AMD-K6", },	/* guesswork */ 
	{ 5,	8,	23,	"AMD-K6 3D", },	/* guesswork */ 
	{ 5,	9,	23,	"AMD-K6 3D+", },/* guesswork */ 
 
	{ 4,	-1,	22,	"Am486", },	/* guesswork */ 
	{ 5,	-1,	23,	"AMD-K5/K6", },	/* guesswork */ 
 
	{ -1,	-1,	23,	"unknown", },	/* total default */ 
};
1997/0327    
void 
cpuidprint(void) 
{
1998/0404/sys/src/9/pc/archgeneric.c:93,105 – 1998/0522/sys/src/9/pc/archgeneric.c:120,137
1998/0401    
	vlong mct;
1997/0327    
 
	cpuid(m->cpuidid, &m->cpuidax, &m->cpuiddx);
1998/0522    
	if(strncmp(m->cpuidid, "AuthenticAMD", 12) == 0) 
		t = x86amd; 
	else 
		t = x86intel;
1997/0327    
	family = X86FAMILY(m->cpuidax); 
	model = X86MODEL(m->cpuidax); 
	for(t = x86type; t->name; t++){
1998/0522    
	while(t->name){
1997/0327    
		if((t->family == family && t->model == model) 
		|| (t->family == family && t->model == -1) 
		|| (t->family == -1)) 
			break;
1998/0522    
		t++;
1997/0327    
	} 
	m->cpuidtype = t->name; 
	i8253init(t->aalcycles);
1998/0522/sys/src/9/pc/archgeneric.c:86,93 – 1998/0702/sys/src/9/pc/archgeneric.c:86,93 (short | long)
add more AMD-K6
rsc Fri Mar 4 12:44:25 2005
1998/0522    
	{ 5,	1,	23,	"AMD-K5", },	/* guesswork */ 
	{ 5,	2,	23,	"AMD-K5", },	/* guesswork */ 
	{ 5,	3,	23,	"AMD-K5", },	/* guesswork */ 
	{ 5,	6,	23,	"AMD-K6", },	/* guesswork */ 
	{ 5,	7,	23,	"AMD-K6", },	/* guesswork */
1998/0702    
	{ 5,	6,	11,	"AMD-K6", },	/* determined by trial and error */ 
	{ 5,	7,	11,	"AMD-K6", },	/* determined by trial and error */
1998/0522    
	{ 5,	8,	23,	"AMD-K6 3D", },	/* guesswork */ 
	{ 5,	9,	23,	"AMD-K6 3D+", },/* guesswork */
1998/0702/sys/src/9/pc/archgeneric.c:17,22 – 1998/0710/sys/src/9/pc/archgeneric.c:17,24 (short | long)
add cycletimerinit, cycletimer. set as arch->fastclock on Pentium+
rsc Fri Mar 4 12:44:25 2005
1992/0923    
}
1997/0327    
void (*coherence)(void) = nop;
1998/0710    
void cycletimerinit(void); 
uvlong cycletimer(uvlong*);
1997/0327    
 
PCArch* arch; 
extern PCArch* knownarch[];
1998/0702/sys/src/9/pc/archgeneric.c:32,37 – 1998/0710/sys/src/9/pc/archgeneric.c:34,41
1997/0327    
	i8259enable,				/* intrenable */ 
 
	i8253enable,				/* clockenable */
1998/0710    
 
	i8253read,				/* read the standard timer */
1997/0327    
}; 
 
typedef struct {
1998/0702/sys/src/9/pc/archgeneric.c:185,190 – 1998/0710/sys/src/9/pc/archgeneric.c:189,200
1997/0327    
			arch->intrenable = archgeneric.intrenable; 
	}
1998/0710    
	/* pick the better timer */ 
	if(X86FAMILY(m->cpuidax) >= 5){ 
		cycletimerinit(); 
		arch->fastclock = cycletimer; 
	}
1997/0327    
	/* 
	 * Decide whether to use copy-on-reference (386 and mp). 
	 */
1998/0702/sys/src/9/pc/archgeneric.c:193,196 – 1998/0710/sys/src/9/pc/archgeneric.c:203,234
1997/0327    
 
	if(X86FAMILY(m->cpuidax) == 6 /*&& conf.nmach > 1*/) 
		coherence = wbflush;
1998/0710    
} 
 
static uvlong fasthz; 
 
void 
cycletimerinit(void) 
{ 
	fasthz = 1000000LL*m->cpumhz; 
} 
 
/* 
 *  return the most precice clock we have 
 */ 
uvlong 
cycletimer(uvlong *hz) 
{ 
	uvlong tsc; 
 
	rdmsr(0x10, (vlong*)&tsc); 
	if(hz != nil) 
		*hz = fasthz; 
	return tsc; 
} 
 
uvlong 
fastticks(uvlong *hz) 
{ 
	return (*arch->fastclock)(hz);
1997/0327    
}
1998/0710/sys/src/9/pc/archgeneric.c:210,215 – 1998/0716/sys/src/9/pc/archgeneric.c:210,216 (short | long)
BUG fix for multiprocessors? wrmsr the cycle counter to 0 in cycletimerinit
rsc Fri Mar 4 12:44:25 2005
1998/0710    
void 
cycletimerinit(void) 
{
1998/0716    
	wrmsr(0x10, 0);
1998/0710    
	fasthz = 1000000LL*m->cpumhz; 
}
1998/0716/sys/src/9/pc/archgeneric.c:223,228 – 1998/0717/sys/src/9/pc/archgeneric.c:223,229 (short | long)
set m->fastclock in cycletimer
rsc Fri Mar 4 12:44:25 2005
1998/0710    
	uvlong tsc; 
 
	rdmsr(0x10, (vlong*)&tsc);
1998/0717    
	m->fastclock = tsc;
1998/0710    
	if(hz != nil) 
		*hz = fasthz; 
	return tsc;
1998/0717/sys/src/9/pc/archgeneric.c:110,116 – 1998/0825/sys/src/9/pc/archgeneric.c:110,116 (short | long)
Bug fix: print format.
rsc Fri Mar 4 12:44:25 2005
1997/0327    
	i = sprint(buf, "cpu%d: %dMHz ", m->machno, m->cpumhz); 
	if(m->cpuidid[0]) 
		i += sprint(buf+i, "%s ", m->cpuidid); 
	sprint(buf+i, "%s (cpuid: AX 0x%4.4luX DX 0x%4.4luX)\n",
1998/0825    
	sprint(buf+i, "%s (cpuid: AX 0x%4.4uX DX 0x%4.4uX)\n",
1997/0327    
		m->cpuidtype, m->cpuidax, m->cpuiddx); 
	print(buf); 
}
1998/0825/sys/src/9/pc/archgeneric.c:63,75 – 1998/0906/sys/src/9/pc/archgeneric.c:63,75 (short | long)
distinguish PentiumII and PentiumII/Xeon; change Pentium, PentiumPro to P5, P6.
rsc Fri Mar 4 12:44:25 2005
1997/0407    
	{ 5,	4,	23,	"P55C MMX", },
1997/0404    
	{ 5,	7,	23,	"P54C VRT", },
1997/0327    
	{ 6,	1,	16,	"PentiumPro", },/* determined by trial and error */
1998/0115    
	{ 6,	3,	16,	"PentiumII", },	/* determined by trial and error */
1998/0404    
	{ 6,	5,	16,	"PentiumII", },	/* determined by trial and error */
1998/0906    
	{ 6,	3,	16,	"PentiumII", }, 
	{ 6,	5,	16,	"PentiumII/Xeon", },
1997/0327    
 
	{ 3,	-1,	32,	"386", },	/* family defaults */ 
	{ 4,	-1,	22,	"486", }, 
	{ 5,	-1,	23,	"Pentium", }, 
	{ 6,	-1,	16,	"PentiumPro", },
1998/0906    
	{ 5,	-1,	23,	"P5", }, 
	{ 6,	-1,	16,	"P6", },
1997/0327    
 
	{ -1,	-1,	23,	"unknown", },	/* total default */
1992/0923    
};
1998/0906/sys/src/9/pc/archgeneric.c:215,221 – 1998/1106/sys/src/9/pc/archgeneric.c:215,221 (short | long)
spelling
rsc Fri Mar 4 12:44:25 2005
1998/0710    
} 
 
/* 
 *  return the most precice clock we have
1998/1106    
 *  return the most precise clock we have
1998/0710    
 */ 
uvlong 
cycletimer(uvlong *hz)
1998/1106/sys/src/9/pc/archgeneric.c:92,99 – 1998/1222/sys/src/9/pc/archgeneric.c:92,99 (short | long)
change delay for AMD-K6 3D processors
rsc Fri Mar 4 12:44:25 2005
1998/0522    
	{ 5,	3,	23,	"AMD-K5", },	/* guesswork */
1998/0702    
	{ 5,	6,	11,	"AMD-K6", },	/* determined by trial and error */ 
	{ 5,	7,	11,	"AMD-K6", },	/* determined by trial and error */
1998/0522    
	{ 5,	8,	23,	"AMD-K6 3D", },	/* guesswork */ 
	{ 5,	9,	23,	"AMD-K6 3D+", },/* guesswork */
1998/1222    
	{ 5,	8,	11,	"AMD-K6 3D", },	/* guesswork */ 
	{ 5,	9,	11,	"AMD-K6 3D+", },/* guesswork */
1998/0522    
 
	{ 4,	-1,	22,	"Am486", },	/* guesswork */ 
	{ 5,	-1,	23,	"AMD-K5/K6", },	/* guesswork */
1998/1222/sys/src/9/pc/archgeneric.c:201,207 – 1999/0112/sys/src/9/pc/archgeneric.c:201,207 (short | long)
use wbflush on Pentium+, not just PentiumPro+
rsc Fri Mar 4 12:44:25 2005
1997/0327    
	if(X86FAMILY(m->cpuidax) == 3 || conf.nmach > 1) 
		conf.copymode = 1; 
 
	if(X86FAMILY(m->cpuidax) == 6 /*&& conf.nmach > 1*/)
1999/0112    
	if(X86FAMILY(m->cpuidax) >= 5)
1997/0327    
		coherence = wbflush;
1998/0710    
}
1999/0112/sys/src/9/pc/archgeneric.c:205,211 – 1999/0129/sys/src/9/pc/archgeneric.c:205,211 (short | long)
publish fasthz; remove fastticks
rsc Fri Mar 4 12:44:25 2005
1997/0327    
		coherence = wbflush;
1998/0710    
} 
 
static uvlong fasthz;
1999/0129    
extern uvlong fasthz;
1998/0710    
 
void 
cycletimerinit(void)
1999/0112/sys/src/9/pc/archgeneric.c:227,236 – 1999/0129/sys/src/9/pc/archgeneric.c:227,230
1998/0710    
	if(hz != nil) 
		*hz = fasthz; 
	return tsc; 
} 
                 
uvlong 
fastticks(uvlong *hz) 
{ 
	return (*arch->fastclock)(hz);
1997/0327    
}
1999/0129/sys/src/9/pc/archgeneric.c:205,211 – 1999/0130/sys/src/9/pc/archgeneric.c:205,211 (short | long)
add fastticks back
rsc Fri Mar 4 12:44:25 2005
1997/0327    
		coherence = wbflush;
1998/0710    
}
1999/0129    
extern uvlong fasthz;
1999/0130    
static uvlong fasthz;
1998/0710    
 
void 
cycletimerinit(void)
1999/0129/sys/src/9/pc/archgeneric.c:227,230 – 1999/0130/sys/src/9/pc/archgeneric.c:227,236
1998/0710    
	if(hz != nil) 
		*hz = fasthz; 
	return tsc;
1999/0130    
} 
 
vlong 
fastticks(uvlong *hz) 
{ 
	return (*arch->fastclock)(hz);
1997/0327    
}
1999/0130/sys/src/9/pc/archgeneric.c:138,144 – 1999/0131/sys/src/9/pc/archgeneric.c:138,144 (short | long)
flag i8253init to say XXX
rsc Fri Mar 4 12:44:25 2005
1998/0522    
		t++;
1997/0327    
	} 
	m->cpuidtype = t->name; 
	i8253init(t->aalcycles);
1999/0131    
	i8253init(t->aalcycles, t->family >= 5);
1997/0327    
 
	/* 
	 * If machine check exception or page size extensions are supported
1999/0131/sys/src/9/pc/archgeneric.c:211,217 – 1999/0218/sys/src/9/pc/archgeneric.c:211,217 (short | long)
change m->cpumhz to m->cpuhz
rsc Fri Mar 4 12:44:25 2005
1998/0710    
cycletimerinit(void) 
{
1998/0716    
	wrmsr(0x10, 0);
1998/0710    
	fasthz = 1000000LL*m->cpumhz;
1999/0218    
	fasthz = m->cpuhz;
1998/0710    
} 
 
/*
1999/0218/sys/src/9/pc/archgeneric.c:1,236 – 1999/0820/sys/src/9/pc/archgeneric.c:0 (short | long)
Deleted.
rsc Mon Mar 7 10:28:56 2005
1992/0923    
#include	"u.h" 
#include	"../port/lib.h" 
#include	"mem.h" 
#include	"dat.h" 
#include	"fns.h" 
#include	"io.h" 
                 
1997/0327    
static int 
unimplemented(int) 
{ 
	return 0; 
} 
                 
1992/0923    
static void
1997/0327    
nop(void)
1992/0923    
{ 
} 
                 
1997/0327    
void (*coherence)(void) = nop;
1998/0710    
void cycletimerinit(void); 
uvlong cycletimer(uvlong*);
1997/0327    
                 
PCArch* arch; 
extern PCArch* knownarch[]; 
                 
PCArch archgeneric = { 
	"generic",				/* id */ 
	0,					/* ident */ 
	i8042reset,				/* reset */ 
	unimplemented,				/* serialpower */ 
	unimplemented,				/* modempower */ 
                 
	i8259init,				/* intrinit */ 
	i8259enable,				/* intrenable */ 
                 
	i8253enable,				/* clockenable */
1998/0710    
                 
	i8253read,				/* read the standard timer */
1997/0327    
}; 
                 
typedef struct { 
	int	family; 
	int	model; 
	int	aalcycles; 
	char*	name; 
} X86type; 
                 
1998/0522    
static X86type x86intel[] =
1992/0923    
{
1997/0327    
	{ 4,	0,	22,	"486DX", },	/* known chips */ 
	{ 4,	1,	22,	"486DX50", }, 
	{ 4,	2,	22,	"486SX", }, 
	{ 4,	3,	22,	"486DX2", }, 
	{ 4,	4,	22,	"486SL", }, 
	{ 4,	5,	22,	"486SX2", }, 
	{ 4,	7,	22,	"DX2WB", },	/* P24D */
1997/0407    
	{ 4,	8,	22,	"DX4", },	/* P24C */ 
	{ 4,	9,	22,	"DX4WB", },	/* P24CT */
1997/0327    
	{ 5,	0,	23,	"P5", }, 
	{ 5,	1,	23,	"P5", }, 
	{ 5,	2,	23,	"P54C", },
1997/0407    
	{ 5,	3,	23,	"P24T", }, 
	{ 5,	4,	23,	"P55C MMX", },
1997/0404    
	{ 5,	7,	23,	"P54C VRT", },
1997/0327    
	{ 6,	1,	16,	"PentiumPro", },/* determined by trial and error */
1998/0906    
	{ 6,	3,	16,	"PentiumII", }, 
	{ 6,	5,	16,	"PentiumII/Xeon", },
1997/0327    
                 
	{ 3,	-1,	32,	"386", },	/* family defaults */ 
	{ 4,	-1,	22,	"486", },
1998/0906    
	{ 5,	-1,	23,	"P5", }, 
	{ 6,	-1,	16,	"P6", },
1997/0327    
                 
	{ -1,	-1,	23,	"unknown", },	/* total default */
1992/0923    
};
1997/0327    
                 
1998/0522    
/* 
 * The AMD processors all implement the CPUID instruction. 
 * The later ones also return the processor name via functions 
 * 0x80000002, 0x80000003 and 0x80000004 in registers AX, BX, CX 
 * and DX: 
 *	K5	"AMD-K5(tm) Processor" 
 *	K6	"AMD-K6tm w/ multimedia extensions" 
 *	K6 3D	"AMD-K6(tm) 3D processor" 
 *	K6 3D+	? 
 */ 
static X86type x86amd[] = 
{ 
	{ 5,	0,	23,	"AMD-K5", },	/* guesswork */ 
	{ 5,	1,	23,	"AMD-K5", },	/* guesswork */ 
	{ 5,	2,	23,	"AMD-K5", },	/* guesswork */ 
	{ 5,	3,	23,	"AMD-K5", },	/* guesswork */
1998/0702    
	{ 5,	6,	11,	"AMD-K6", },	/* determined by trial and error */ 
	{ 5,	7,	11,	"AMD-K6", },	/* determined by trial and error */
1998/1222    
	{ 5,	8,	11,	"AMD-K6 3D", },	/* guesswork */ 
	{ 5,	9,	11,	"AMD-K6 3D+", },/* guesswork */
1998/0522    
                 
	{ 4,	-1,	22,	"Am486", },	/* guesswork */ 
	{ 5,	-1,	23,	"AMD-K5/K6", },	/* guesswork */ 
                 
	{ -1,	-1,	23,	"unknown", },	/* total default */ 
}; 
                 
1997/0327    
void 
cpuidprint(void) 
{ 
	int i; 
	char buf[128]; 
                 
	i = sprint(buf, "cpu%d: %dMHz ", m->machno, m->cpumhz); 
	if(m->cpuidid[0]) 
		i += sprint(buf+i, "%s ", m->cpuidid);
1998/0825    
	sprint(buf+i, "%s (cpuid: AX 0x%4.4uX DX 0x%4.4uX)\n",
1997/0327    
		m->cpuidtype, m->cpuidax, m->cpuiddx); 
	print(buf); 
} 
                 
int 
cpuidentify(void) 
{ 
	int family, model; 
	X86type *t;
1998/0401    
	ulong cr4; 
	vlong mct;
1997/0327    
                 
	cpuid(m->cpuidid, &m->cpuidax, &m->cpuiddx);
1998/0522    
	if(strncmp(m->cpuidid, "AuthenticAMD", 12) == 0) 
		t = x86amd; 
	else 
		t = x86intel;
1997/0327    
	family = X86FAMILY(m->cpuidax); 
	model = X86MODEL(m->cpuidax);
1998/0522    
	while(t->name){
1997/0327    
		if((t->family == family && t->model == model) 
		|| (t->family == family && t->model == -1) 
		|| (t->family == -1)) 
			break;
1998/0522    
		t++;
1997/0327    
	} 
	m->cpuidtype = t->name;
1999/0131    
	i8253init(t->aalcycles, t->family >= 5);
1997/0327    
                 
	/* 
	 * If machine check exception or page size extensions are supported 
	 * enable them in CR4 and clear any other set extensions. 
	 * If machine check was enabled clear out any lingering status. 
	 */ 
	if(m->cpuiddx & 0x88){ 
		cr4 = 0; 
		if(m->cpuiddx & 0x08) 
			cr4 |= 0x10;		/* page size extensions */ 
		if(m->cpuiddx & 0x80) 
			cr4 |= 0x40;		/* machine check enable */ 
		putcr4(cr4); 
		if(m->cpuiddx & 0x80)
1998/0401    
			rdmsr(0x01, &mct);
1997/0327    
	} 
                 
	return t->family; 
} 
                 
void 
archinit(void) 
{ 
	PCArch **p; 
                 
	arch = 0; 
	for(p = knownarch; *p; p++){ 
		if((*p)->ident && (*p)->ident() == 0){ 
			arch = *p; 
			break; 
		} 
	} 
	if(arch == 0) 
		arch = &archgeneric; 
	else{ 
		if(arch->id == 0) 
			arch->id = archgeneric.id; 
		if(arch->reset == 0) 
			arch->reset = archgeneric.reset; 
		if(arch->serialpower == 0) 
			arch->serialpower = archgeneric.serialpower; 
		if(arch->modempower == 0) 
			arch->modempower = archgeneric.modempower; 
	                 
		if(arch->intrinit == 0) 
			arch->intrinit = archgeneric.intrinit; 
		if(arch->intrenable == 0) 
			arch->intrenable = archgeneric.intrenable; 
	} 
                 
1998/0710    
	/* pick the better timer */ 
	if(X86FAMILY(m->cpuidax) >= 5){ 
		cycletimerinit(); 
		arch->fastclock = cycletimer; 
	} 
                 
1997/0327    
	/* 
	 * Decide whether to use copy-on-reference (386 and mp). 
	 */ 
	if(X86FAMILY(m->cpuidax) == 3 || conf.nmach > 1) 
		conf.copymode = 1; 
                 
1999/0112    
	if(X86FAMILY(m->cpuidax) >= 5)
1997/0327    
		coherence = wbflush;
1998/0710    
} 
                 
1999/0130    
static uvlong fasthz;
1998/0710    
                 
void 
cycletimerinit(void) 
{
1998/0716    
	wrmsr(0x10, 0);
1999/0218    
	fasthz = m->cpuhz;
1998/0710    
} 
                 
/*
1998/1106    
 *  return the most precise clock we have
1998/0710    
 */ 
uvlong 
cycletimer(uvlong *hz) 
{ 
	uvlong tsc; 
                 
	rdmsr(0x10, (vlong*)&tsc);
1998/0717    
	m->fastclock = tsc;
1998/0710    
	if(hz != nil) 
		*hz = fasthz; 
	return tsc;
1999/0130    
} 
                 
vlong 
fastticks(uvlong *hz) 
{ 
	return (*arch->fastclock)(hz);
1997/0327    
}


source code copyright © 1990-2005 Lucent Technologies; see license
Plan 9 distribution
comments to russ cox (rsc@swtch.com)