| plan 9 kernel history: overview | file list | diff list |
1999/0415/alphapc/pci.c (diff list | history)
| 1999/0415/sys/src/9/alphapc/pci.c:349,351 – 1999/0422/sys/src/9/alphapc/pci.c:349,361 (short | long) | ||
| 1999/0415 | pcicfgw16(p, PciPSR, pcr & ~0x04); } } | |
| 1999/0422 | void pcisetbme(Pcidev* p) { int pcr; pcr = pcicfgr16(p, PciPCR); pcr |= 0x0004; pcicfgw16(p, PciPCR, pcr); } | |
| 1999/0422/sys/src/9/alphapc/pci.c:40,50 – 1999/0507/sys/src/9/alphapc/pci.c:40,51 (short | long) | ||
| 1999/0415 | maxfno = 0; for(fno = 0; fno <= maxfno; fno++){ /* | |
| 1999/0507 | * For this possible device, form the * bus+device+function triplet needed to address it * and try to read the vendor and device ID. * If successful, allocate a device struct and * start to fill it in with some useful information * from the device's configuration space. | |
| 1999/0415 | */ tbdf = MKBUS(BusPCI, bno, dno, fno); l = pcicfgrw32(tbdf, PciVID, 0, 1); | |
| 1999/0422/sys/src/9/alphapc/pci.c:70,76 – 1999/0507/sys/src/9/alphapc/pci.c:71,79 | ||
| 1999/0415 | pcitail = p; p->intl = pcicfgr8(p, PciINTL); | |
| 1999/0507 | p->ccrp = pcicfgr8(p, PciCCRp); p->ccru = pcicfgr8(p, PciCCRu); p->ccrb = pcicfgr8(p, PciCCRb); | |
| 1999/0415 | /* * If the device is a multi-function device adjust the | |
| 1999/0422/sys/src/9/alphapc/pci.c:84,90 – 1999/0507/sys/src/9/alphapc/pci.c:87,93 | ||
| 1999/0415 | * If appropriate, read the base address registers * and work out the sizes. */ | |
| 1999/0507 | switch(p->ccrb){ | |
| 1999/0415 | case 0x01: /* mass storage controller */ case 0x02: /* network controller */ | |
| 1999/0422/sys/src/9/alphapc/pci.c:129,135 – 1999/0507/sys/src/9/alphapc/pci.c:132,138 | ||
| 1999/0415 | /* * Find PCI-PCI bridges and recursively descend the tree. */ | |
| 1999/0507 | if(p->ccrb != 0x06 || p->ccru != 0x04) | |
| 1999/0415 | continue; /* | |
| 1999/0422/sys/src/9/alphapc/pci.c:311,324 – 1999/0507/sys/src/9/alphapc/pci.c:314,329 | ||
| 1999/0415 | int i; Pcidev *t; | |
| 1999/0507 | if(pcicfgmode == -1) pcicfginit(); | |
| 1999/0415 | if(p == nil) { p = pciroot; print("bus dev type vid did intl memory\n"); } for(t = p; t != nil; t = t->link) { | |
| 1999/0507 | print("%d %2d/%d %.2ux %.2ux %.2ux %.4ux %.4ux %2d ", | |
| 1999/0415 | BUSBNO(t->tbdf), BUSDNO(t->tbdf), BUSFNO(t->tbdf), | |
| 1999/0507 | t->ccrb, t->ccru, t->ccrp, t->vid, t->did, t->intl); | |
| 1999/0415 | for(i = 0; i < nelem(p->mem); i++) { if(t->mem[i].size == 0) | |
| 1999/0507/sys/src/9/alphapc/pci.c:26,31 – 2000/0401/sys/src/9/alphapc/pci.c:26,33 (short | long) | ||
| 1999/0415 | static int pcicfgrw32(int, int, int, int); | |
| 2000/0401 | uchar *vgabios; | |
| 1999/0415 | static int pciscan(int bno, Pcidev** list) { | |
| 1999/0507/sys/src/9/alphapc/pci.c:89,97 – 2000/0401/sys/src/9/alphapc/pci.c:91,106 | ||
| 1999/0415 | */ | |
| 1999/0507 | switch(p->ccrb){ | |
| 1999/0415 | ||
| 2000/0401 | case 0x03: /* display controller */ if(vgabios == nil) { v = pcicfgr32(p, PciROM); pcicfgw32(p, PciROM, v|1); /* enable decode */ vgabios = kmapv(((uvlong)0x88<<32LL)|(v&~0xffff), 0x10000); // print("VGA BIOS %lux -> %lux\n", v, vgabios); } /* fall through */ | |
| 1999/0415 | case 0x01: /* mass storage controller */ case 0x02: /* network controller */ | |
| 2000/0401/sys/src/9/alphapc/pci.c:72,81 – 2000/0515/sys/src/9/alphapc/pci.c:72,84 (short | long) | ||
| 1999/0415 | pcilist = p; pcitail = p; | |
| 2000/0515 | p->rid = pcicfgr8(p, PciRID); | |
| 1999/0507 | p->ccrp = pcicfgr8(p, PciCCRp); p->ccru = pcicfgr8(p, PciCCRu); p->ccrb = pcicfgr8(p, PciCCRb); | |
| 2000/0515 | p->pcr = pcicfgr32(p, PciPCR); p->intl = pcicfgr8(p, PciINTL); | |
| 1999/0415 | /* * If the device is a multi-function device adjust the | |
| 2000/0515/sys/src/9/alphapc/pci.c:320,325 – 2001/0801/sys/src/9/alphapc/pci.c:320,340 (short | long) | ||
| 1999/0415 | return prev; } | |
| 2001/0801 | Pcidev* pcimatchtbdf(int tbdf) { Pcidev *pcidev; if(pcicfgmode == -1) pcicfginit(); for(pcidev = pcilist; pcidev != nil; pcidev = pcidev->list) { if(pcidev->tbdf == tbdf) break; } return pcidev; } | |
| 1999/0415 | void pcihinv(Pcidev* p) { | |
| 2001/0801/sys/src/9/alphapc/pci.c:16,21 – 2001/1023/sys/src/9/alphapc/pci.c:16,31 (short | long) | ||
| 1999/0415 | MaxUBN = 255, }; | |
| 2001/1023 | enum { /* command register */ IOen = (1<<0), MEMen = (1<<1), MASen = (1<<2), MemWrInv = (1<<4), PErrEn = (1<<6), SErrEn = (1<<8), }; | |
| 1999/0415 | static Lock pcicfglock; static Lock pcicfginitlock; static int pcicfgmode = -1; | |
| 2001/0801/sys/src/9/alphapc/pci.c:388,393 – 2001/1023/sys/src/9/alphapc/pci.c:398,413 | ||
| 1999/0422 | int pcr; pcr = pcicfgr16(p, PciPCR); | |
| 2001/1023 | pcr |= MASen; pcicfgw16(p, PciPCR, pcr); } void pciclrbme(Pcidev* p) { int pcr; pcr = pcicfgr16(p, PciPCR); pcr &= ~MASen; | |
| 1999/0422 | pcicfgw16(p, PciPCR, pcr); } | |
| 2001/1023/sys/src/9/alphapc/pci.c:197,211 – 2002/1130/sys/src/9/alphapc/pci.c:197,210 (short | long) | ||
| 1999/0415 | static void pcicfginit(void) { | |
| 2002/1130 | char *p; | |
| 1999/0415 | lock(&pcicfginitlock); if(pcicfgmode == -1){ pcicfgmode = 0; | |
| 2002/1130 | pcimaxdno = 15; /* was 20; what is correct value??? */ if(p = getconf("*pcimaxdno")) pcimaxdno = strtoul(p, 0, 0); | |
| 1999/0415 | pciscan(0, &pciroot); } unlock(&pcicfginitlock); | |